Skip to content

Commit 94f5164

Browse files
authored
[LLVM][X86] Add EFLAGS Defs for VERR/VERW instructions (#81824)
VERR/VERW instructions will define ZF flag.
1 parent 6087d7b commit 94f5164

File tree

1 file changed

+2
-0
lines changed

1 file changed

+2
-0
lines changed

llvm/lib/Target/X86/X86InstrSystem.td

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -366,12 +366,14 @@ def LGS32rm : I<0xb5, MRMSrcMem, (outs GR32:$dst), (ins opaquemem:$src),
366366
def LGS64rm : RI<0xb5, MRMSrcMem, (outs GR64:$dst), (ins opaquemem:$src),
367367
"lgs{q}\t{$src, $dst|$dst, $src}", []>, TB;
368368

369+
let Defs = [EFLAGS] in {
369370
def VERRr : I<0x00, MRM4r, (outs), (ins GR16:$seg), "verr\t$seg", []>, TB;
370371
def VERWr : I<0x00, MRM5r, (outs), (ins GR16:$seg), "verw\t$seg", []>, TB;
371372
let mayLoad = 1 in {
372373
def VERRm : I<0x00, MRM4m, (outs), (ins i16mem:$seg), "verr\t$seg", []>, TB;
373374
def VERWm : I<0x00, MRM5m, (outs), (ins i16mem:$seg), "verw\t$seg", []>, TB;
374375
}
376+
} // Defs EFLAGS
375377
} // SchedRW
376378

377379
//===----------------------------------------------------------------------===//

0 commit comments

Comments
 (0)