[VectorCombine] Add tests for #67060 (NFC)

Author: nikic

llvm/test/Transforms/VectorCombine/AArch64/load-extractelement-scalarization.ll

@@ -656,6 +656,18 @@ define i31 @load_with_non_power_of_2_element_type(ptr %x) {
   ret i31 %r
 }
 
+; FIXME: This is a miscompile.
+define i1 @load_with_non_power_of_2_element_type_2(ptr %x) {
+; CHECK-LABEL: @load_with_non_power_of_2_element_type_2(
+; CHECK-NEXT:    [[TMP1:%.*]] = getelementptr inbounds <8 x i1>, ptr [[X:%.*]], i32 0, i32 1
+; CHECK-NEXT:    [[R:%.*]] = load i1, ptr [[TMP1]], align 1
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %lv = load <8 x i1>, ptr %x
+  %r = extractelement <8 x i1> %lv, i32 1
+  ret i1 %r
+}
+
 ; Scalarizing the load for multiple constant indices may not be profitable.
 define i32 @load_multiple_extracts_with_constant_idx(ptr %x) {
 ; CHECK-LABEL: @load_multiple_extracts_with_constant_idx(

llvm/test/Transforms/VectorCombine/load-insert-store.ll

@@ -107,6 +107,19 @@ entry:
   ret void
 }
 
+; FIXME: This is a miscompile.
+define void @insert_store_v32i1(ptr %p) {
+; CHECK-LABEL: @insert_store_v32i1(
+; CHECK-NEXT:    [[TMP1:%.*]] = getelementptr inbounds <32 x i1>, ptr [[P:%.*]], i64 0, i64 0
+; CHECK-NEXT:    store i1 true, ptr [[TMP1]], align 4
+; CHECK-NEXT:    ret void
+;
+  %vec = load <32 x i1>, ptr %p
+  %ins = insertelement <32 x i1> %vec, i1 true, i64 0
+  store <32 x i1> %ins, ptr %p
+  ret void
+}
+
 define void @insert_store_blk_differ(ptr %q, i16 zeroext %s) {
 ; CHECK-LABEL: @insert_store_blk_differ(
 ; CHECK-NEXT:  entry: