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[AMDGPU] Refactor code for GETPC bundle updates in hazards (NFCI)
As suggested in review for PR #100067. Refactor code for S_GETPC_B64 bundle updates for use with multiple hazard mitigations.
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+36
-14
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+36
-14
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llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp

Lines changed: 36 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -2851,6 +2851,38 @@ bool GCNHazardRecognizer::ShouldPreferAnother(SUnit *SU) {
28512851
return false;
28522852
}
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2854+
// Adjust global offsets for instructions bundled with S_GETPC_B64 after
2855+
// insertion of a new instruction.
2856+
static void updateGetPCBundle(MachineInstr *NewMI) {
2857+
if (!NewMI->isBundled())
2858+
return;
2859+
2860+
// Find start of bundle.
2861+
auto I = NewMI->getIterator();
2862+
while (I->isBundledWithPred())
2863+
I--;
2864+
if (I->isBundle())
2865+
I++;
2866+
2867+
// Bail if this is not an S_GETPC bundle.
2868+
if (I->getOpcode() != AMDGPU::S_GETPC_B64)
2869+
return;
2870+
2871+
// Update offsets of any references in the bundle.
2872+
const unsigned NewBytes = 4;
2873+
assert(NewMI->getOpcode() == AMDGPU::S_WAITCNT_DEPCTR &&
2874+
"Unexpected instruction insertion in bundle");
2875+
auto NextMI = std::next(NewMI->getIterator());
2876+
auto End = NewMI->getParent()->end();
2877+
while (NextMI != End && NextMI->isBundledWithPred()) {
2878+
for (auto &Operand : NextMI->operands()) {
2879+
if (Operand.isGlobal())
2880+
Operand.setOffset(Operand.getOffset() + NewBytes);
2881+
}
2882+
NextMI++;
2883+
}
2884+
}
2885+
28542886
bool GCNHazardRecognizer::fixVALUMaskWriteHazard(MachineInstr *MI) {
28552887
if (!ST.hasVALUMaskWriteHazard())
28562888
return false;
@@ -2968,22 +3000,12 @@ bool GCNHazardRecognizer::fixVALUMaskWriteHazard(MachineInstr *MI) {
29683000
auto NextMI = std::next(MI->getIterator());
29693001

29703002
// Add s_waitcnt_depctr sa_sdst(0) after SALU write.
2971-
BuildMI(*MI->getParent(), NextMI, MI->getDebugLoc(),
2972-
TII.get(AMDGPU::S_WAITCNT_DEPCTR))
2973-
.addImm(AMDGPU::DepCtr::encodeFieldSaSdst(0));
3003+
auto NewMI = BuildMI(*MI->getParent(), NextMI, MI->getDebugLoc(),
3004+
TII.get(AMDGPU::S_WAITCNT_DEPCTR))
3005+
.addImm(AMDGPU::DepCtr::encodeFieldSaSdst(0));
29743006

29753007
// SALU write may be s_getpc in a bundle.
2976-
if (MI->getOpcode() == AMDGPU::S_GETPC_B64) {
2977-
// Update offsets of any references in the bundle.
2978-
while (NextMI != MI->getParent()->end() &&
2979-
NextMI->isBundledWithPred()) {
2980-
for (auto &Operand : NextMI->operands()) {
2981-
if (Operand.isGlobal())
2982-
Operand.setOffset(Operand.getOffset() + 4);
2983-
}
2984-
NextMI++;
2985-
}
2986-
}
3008+
updateGetPCBundle(NewMI);
29873009

29883010
return true;
29893011
}

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