Skip to content

Commit 99b5631

Browse files
committed
[AMDGPU][MC] Corrected error position for invalid operands
Generic parser may report an incorrect error position when an offending operand is followed by a comma. See bug 48884 for details: https://bugs.llvm.org/show_bug.cgi?id=48884. Differential Revision: https://reviews.llvm.org/D95674
1 parent b8923c0 commit 99b5631

File tree

2 files changed

+8
-3
lines changed

2 files changed

+8
-3
lines changed

llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -4942,9 +4942,6 @@ bool AMDGPUAsmParser::ParseInstruction(ParseInstructionInfo &Info,
49424942
Mode = OperandMode_NSA;
49434943
OperandMatchResultTy Res = parseOperand(Operands, Name, Mode);
49444944

4945-
// Eat the comma or space if there is one.
4946-
trySkipToken(AsmToken::Comma);
4947-
49484945
if (Res != MatchOperand_Success) {
49494946
checkUnsupportedInstruction(Name, NameLoc);
49504947
if (!Parser.hasPendingError()) {
@@ -4959,6 +4956,9 @@ bool AMDGPUAsmParser::ParseInstruction(ParseInstructionInfo &Info,
49594956
}
49604957
return true;
49614958
}
4959+
4960+
// Eat the comma or space if there is one.
4961+
trySkipToken(AsmToken::Comma);
49624962
}
49634963

49644964
return false;

llvm/test/MC/AMDGPU/gfx10_err_pos.s

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -535,6 +535,11 @@ v_ceil_f16 v0, abs(neg(1))
535535
// CHECK-NEXT:{{^}}v_ceil_f16 v0, abs(neg(1))
536536
// CHECK-NEXT:{{^}} ^
537537

538+
image_atomic_xor v4, v32, s[96:103] dmask:0x1 dim:, glc
539+
// CHECK: error: failed parsing operand.
540+
// CHECK-NEXT:{{^}}image_atomic_xor v4, v32, s[96:103] dmask:0x1 dim:, glc
541+
// CHECK-NEXT:{{^}} ^
542+
538543
//==============================================================================
539544
// first register index should not exceed second index
540545

0 commit comments

Comments
 (0)