@@ -90,13 +90,20 @@ int hoo(void) {
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//.
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// CHECK: @__aarch64_cpu_features = external dso_local global { i64 }
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- // CHECK: @fmv.ifunc = weak_odr ifunc i32 (), ptr @fmv.resolver
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- // CHECK: @fmv_one.ifunc = weak_odr ifunc i32 (), ptr @fmv_one.resolver
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- // CHECK: @fmv_two.ifunc = weak_odr ifunc i32 (), ptr @fmv_two.resolver
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- // CHECK: @fmv_e.ifunc = weak_odr ifunc i32 (), ptr @fmv_e.resolver
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- // CHECK: @fmv_c.ifunc = weak_odr ifunc void (), ptr @fmv_c.resolver
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- // CHECK: @fmv_inline.ifunc = weak_odr ifunc i32 (), ptr @fmv_inline.resolver
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- // CHECK: @fmv_d.ifunc = internal ifunc i32 (), ptr @fmv_d.resolver
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+ // CHECK: @fmv.ifunc = weak_odr alias i32 (), ptr @fmv
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+ // CHECK: @fmv_one.ifunc = weak_odr alias i32 (), ptr @fmv_one
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+ // CHECK: @fmv_two.ifunc = weak_odr alias i32 (), ptr @fmv_two
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+ // CHECK: @fmv_e.ifunc = weak_odr alias i32 (), ptr @fmv_e
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+ // CHECK: @fmv_inline.ifunc = weak_odr alias i32 (), ptr @fmv_inline
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+ // CHECK: @fmv_d.ifunc = internal alias i32 (), ptr @fmv_d
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+ // CHECK: @fmv_c.ifunc = weak_odr alias void (), ptr @fmv_c
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+ // CHECK: @fmv = weak_odr ifunc i32 (), ptr @fmv.resolver
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+ // CHECK: @fmv_one = weak_odr ifunc i32 (), ptr @fmv_one.resolver
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+ // CHECK: @fmv_two = weak_odr ifunc i32 (), ptr @fmv_two.resolver
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+ // CHECK: @fmv_e = weak_odr ifunc i32 (), ptr @fmv_e.resolver
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+ // CHECK: @fmv_inline = weak_odr ifunc i32 (), ptr @fmv_inline.resolver
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+ // CHECK: @fmv_d = internal ifunc i32 (), ptr @fmv_d.resolver
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+ // CHECK: @fmv_c = weak_odr ifunc void (), ptr @fmv_c.resolver
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//.
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@fmv._MrngMflagmMfp16fml
@@ -105,6 +112,32 @@ int hoo(void) {
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// CHECK-NEXT: ret i32 1
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//
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//
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+ // CHECK: Function Attrs: noinline nounwind optnone
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+ // CHECK-LABEL: define {{[^@]+}}@fmv_one._MsimdMls64
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+ // CHECK-SAME: () #[[ATTR1:[0-9]+]] {
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+ // CHECK-NEXT: entry:
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+ // CHECK-NEXT: ret i32 1
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+ //
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+ //
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+ // CHECK: Function Attrs: noinline nounwind optnone
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+ // CHECK-LABEL: define {{[^@]+}}@fmv_two._Mfp
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+ // CHECK-SAME: () #[[ATTR1]] {
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+ // CHECK-NEXT: entry:
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+ // CHECK-NEXT: ret i32 1
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+ //
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+ //
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+ // CHECK: Function Attrs: noinline nounwind optnone
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+ // CHECK-LABEL: define {{[^@]+}}@foo
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+ // CHECK-SAME: () #[[ATTR2:[0-9]+]] {
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+ // CHECK-NEXT: entry:
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+ // CHECK-NEXT: [[CALL:%.*]] = call i32 @fmv()
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+ // CHECK-NEXT: [[CALL1:%.*]] = call i32 @fmv_one()
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+ // CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL]], [[CALL1]]
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+ // CHECK-NEXT: [[CALL2:%.*]] = call i32 @fmv_two()
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+ // CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[ADD]], [[CALL2]]
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+ // CHECK-NEXT: ret i32 [[ADD3]]
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+ //
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+ //
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// CHECK-LABEL: define {{[^@]+}}@fmv.resolver() comdat {
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// CHECK-NEXT: resolver_entry:
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// CHECK-NEXT: call void @__init_cpu_features_resolver()
@@ -183,42 +216,16 @@ int hoo(void) {
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// CHECK-NEXT: ret ptr @fmv.default
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//
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//
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- // CHECK: Function Attrs: noinline nounwind optnone
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- // CHECK-LABEL: define {{[^@]+}}@fmv_one._MsimdMls64
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- // CHECK-SAME: () #[[ATTR1:[0-9]+]] {
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- // CHECK-NEXT: entry:
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- // CHECK-NEXT: ret i32 1
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- //
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- //
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// CHECK-LABEL: define {{[^@]+}}@fmv_one.resolver() comdat {
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// CHECK-NEXT: resolver_entry:
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// CHECK-NEXT: ret ptr @fmv_one._MsimdMls64
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//
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//
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- // CHECK: Function Attrs: noinline nounwind optnone
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- // CHECK-LABEL: define {{[^@]+}}@fmv_two._Mfp
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- // CHECK-SAME: () #[[ATTR1]] {
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- // CHECK-NEXT: entry:
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- // CHECK-NEXT: ret i32 1
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- //
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- //
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// CHECK-LABEL: define {{[^@]+}}@fmv_two.resolver() comdat {
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// CHECK-NEXT: resolver_entry:
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// CHECK-NEXT: ret ptr @fmv_two._MsimdMfp16
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//
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//
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- // CHECK: Function Attrs: noinline nounwind optnone
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- // CHECK-LABEL: define {{[^@]+}}@foo
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- // CHECK-SAME: () #[[ATTR2:[0-9]+]] {
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- // CHECK-NEXT: entry:
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- // CHECK-NEXT: [[CALL:%.*]] = call i32 @fmv.ifunc()
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- // CHECK-NEXT: [[CALL1:%.*]] = call i32 @fmv_one.ifunc()
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- // CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL]], [[CALL1]]
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- // CHECK-NEXT: [[CALL2:%.*]] = call i32 @fmv_two.ifunc()
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- // CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[ADD]], [[CALL2]]
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- // CHECK-NEXT: ret i32 [[ADD3]]
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- //
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- //
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// CHECK-LABEL: define {{[^@]+}}@fmv_e.resolver() comdat {
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// CHECK-NEXT: resolver_entry:
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// CHECK-NEXT: ret ptr @fmv_e._Mls64
@@ -238,28 +245,14 @@ int hoo(void) {
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// CHECK-NEXT: ret void
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//
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//
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- // CHECK-LABEL: define {{[^@]+}}@fmv_c.resolver() comdat {
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- // CHECK-NEXT: resolver_entry:
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- // CHECK-NEXT: call void @__init_cpu_features_resolver()
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- // CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
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- // CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 281474976710656
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- // CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 281474976710656
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- // CHECK-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]
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- // CHECK-NEXT: br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]
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- // CHECK: resolver_return:
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- // CHECK-NEXT: ret ptr @fmv_c._Mssbs
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- // CHECK: resolver_else:
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- // CHECK-NEXT: ret ptr @fmv_c.default
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- //
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- //
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@goo
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// CHECK-SAME: () #[[ATTR2]] {
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// CHECK-NEXT: entry:
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- // CHECK-NEXT: [[CALL:%.*]] = call i32 @fmv_inline.ifunc ()
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- // CHECK-NEXT: [[CALL1:%.*]] = call i32 @fmv_e.ifunc ()
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- // CHECK-NEXT: [[CALL2:%.*]] = call i32 @fmv_d.ifunc ()
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- // CHECK-NEXT: call void @fmv_c.ifunc ()
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+ // CHECK-NEXT: [[CALL:%.*]] = call i32 @fmv_inline()
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+ // CHECK-NEXT: [[CALL1:%.*]] = call i32 @fmv_e()
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+ // CHECK-NEXT: [[CALL2:%.*]] = call i32 @fmv_d()
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+ // CHECK-NEXT: call void @fmv_c()
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// CHECK-NEXT: [[CALL3:%.*]] = call i32 @fmv_default()
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// CHECK-NEXT: ret i32 [[CALL3]]
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//
@@ -412,6 +405,20 @@ int hoo(void) {
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// CHECK-NEXT: ret ptr @fmv_d.default
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//
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//
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+ // CHECK-LABEL: define {{[^@]+}}@fmv_c.resolver() comdat {
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+ // CHECK-NEXT: resolver_entry:
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+ // CHECK-NEXT: call void @__init_cpu_features_resolver()
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+ // CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
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+ // CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 281474976710656
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+ // CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 281474976710656
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+ // CHECK-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]
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+ // CHECK-NEXT: br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]
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+ // CHECK: resolver_return:
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+ // CHECK-NEXT: ret ptr @fmv_c._Mssbs
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+ // CHECK: resolver_else:
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+ // CHECK-NEXT: ret ptr @fmv_c.default
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+ //
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+ //
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// CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@recur
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// CHECK-SAME: () #[[ATTR2]] {
@@ -437,9 +444,9 @@ int hoo(void) {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[FP1:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[FP2:%.*]] = alloca ptr, align 8
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- // CHECK-NEXT: call void @f(ptr noundef @fmv.ifunc )
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- // CHECK-NEXT: store ptr @fmv.ifunc , ptr [[FP1]], align 8
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- // CHECK-NEXT: store ptr @fmv.ifunc , ptr [[FP2]], align 8
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+ // CHECK-NEXT: call void @f(ptr noundef @fmv)
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+ // CHECK-NEXT: store ptr @fmv, ptr [[FP1]], align 8
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+ // CHECK-NEXT: store ptr @fmv, ptr [[FP2]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[FP1]], align 8
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// CHECK-NEXT: [[CALL:%.*]] = call i32 [[TMP0]]()
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// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[FP2]], align 8
@@ -561,13 +568,6 @@ int hoo(void) {
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//
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//
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// CHECK: Function Attrs: noinline nounwind optnone
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- // CHECK-LABEL: define {{[^@]+}}@fmv_c.default
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- // CHECK-SAME: () #[[ATTR2]] {
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- // CHECK-NEXT: entry:
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- // CHECK-NEXT: ret void
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- //
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- //
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- // CHECK: Function Attrs: noinline nounwind optnone
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// CHECK-LABEL: define {{[^@]+}}@fmv_inline._Msha1MpmullMf64mm
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// CHECK-SAME: () #[[ATTR12:[0-9]+]] {
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// CHECK-NEXT: entry:
@@ -700,6 +700,13 @@ int hoo(void) {
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// CHECK-NEXT: ret i32 1
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//
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//
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+ // CHECK: Function Attrs: noinline nounwind optnone
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+ // CHECK-LABEL: define {{[^@]+}}@fmv_c.default
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+ // CHECK-SAME: () #[[ATTR2]] {
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+ // CHECK-NEXT: entry:
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+ // CHECK-NEXT: ret void
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+ //
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+ //
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// CHECK-NOFMV: Function Attrs: noinline nounwind optnone
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// CHECK-NOFMV-LABEL: define {{[^@]+}}@fmv
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// CHECK-NOFMV-SAME: () #[[ATTR0:[0-9]+]] {
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