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[GVN] Add extra vscale tests with different types. NFC
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‎llvm/test/Transforms/GVN/vscale.ll

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@@ -387,3 +387,235 @@ if.then:
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if.else:
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ret void
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}
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; Different sizes / types
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define <vscale x 16 x i8> @load_v16i8_store_v4i32_forward_load(ptr %p, <vscale x 4 x i32> %x) {
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; CHECK-LABEL: @load_v16i8_store_v4i32_forward_load(
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; CHECK-NEXT: store <vscale x 4 x i32> [[X:%.*]], ptr [[P:%.*]], align 16
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; CHECK-NEXT: [[LOAD:%.*]] = load <vscale x 16 x i8>, ptr [[P]], align 16
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; CHECK-NEXT: ret <vscale x 16 x i8> [[LOAD]]
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;
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store <vscale x 4 x i32> %x, ptr %p
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%load = load <vscale x 16 x i8>, ptr %p
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ret <vscale x 16 x i8> %load
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}
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define <vscale x 4 x float> @load_v4f32_store_v4i32_forward_load(ptr %p, <vscale x 4 x i32> %x) {
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; CHECK-LABEL: @load_v4f32_store_v4i32_forward_load(
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; CHECK-NEXT: store <vscale x 4 x i32> [[X:%.*]], ptr [[P:%.*]], align 16
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; CHECK-NEXT: [[LOAD:%.*]] = load <vscale x 4 x float>, ptr [[P]], align 16
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; CHECK-NEXT: ret <vscale x 4 x float> [[LOAD]]
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;
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store <vscale x 4 x i32> %x, ptr %p
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%load = load <vscale x 4 x float>, ptr %p
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ret <vscale x 4 x float> %load
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}
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define <vscale x 4 x float> @load_v4f32_store_v16i8_forward_load(ptr %p, <vscale x 16 x i8> %x) {
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; CHECK-LABEL: @load_v4f32_store_v16i8_forward_load(
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; CHECK-NEXT: store <vscale x 16 x i8> [[X:%.*]], ptr [[P:%.*]], align 16
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; CHECK-NEXT: [[LOAD:%.*]] = load <vscale x 4 x float>, ptr [[P]], align 16
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; CHECK-NEXT: ret <vscale x 4 x float> [[LOAD]]
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;
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store <vscale x 16 x i8> %x, ptr %p
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%load = load <vscale x 4 x float>, ptr %p
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ret <vscale x 4 x float> %load
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}
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define <vscale x 4 x i32> @load_v4i32_store_v4f32_forward_load(ptr %p, <vscale x 4 x float> %x) {
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; CHECK-LABEL: @load_v4i32_store_v4f32_forward_load(
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; CHECK-NEXT: store <vscale x 4 x float> [[X:%.*]], ptr [[P:%.*]], align 16
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; CHECK-NEXT: [[LOAD:%.*]] = load <vscale x 4 x i32>, ptr [[P]], align 16
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; CHECK-NEXT: ret <vscale x 4 x i32> [[LOAD]]
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;
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store <vscale x 4 x float> %x, ptr %p
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%load = load <vscale x 4 x i32>, ptr %p
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ret <vscale x 4 x i32> %load
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}
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define <vscale x 4 x i32> @load_v4i32_store_v4i64_forward_load(ptr %p, <vscale x 4 x i64> %x) {
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; CHECK-LABEL: @load_v4i32_store_v4i64_forward_load(
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; CHECK-NEXT: store <vscale x 4 x i64> [[X:%.*]], ptr [[P:%.*]], align 32
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; CHECK-NEXT: [[LOAD:%.*]] = load <vscale x 4 x i32>, ptr [[P]], align 16
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; CHECK-NEXT: ret <vscale x 4 x i32> [[LOAD]]
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;
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store <vscale x 4 x i64> %x, ptr %p
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%load = load <vscale x 4 x i32>, ptr %p
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ret <vscale x 4 x i32> %load
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}
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define <vscale x 4 x i64> @load_v4i64_store_v4i32_forward_load(ptr %p, <vscale x 4 x i32> %x) {
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; CHECK-LABEL: @load_v4i64_store_v4i32_forward_load(
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; CHECK-NEXT: store <vscale x 4 x i32> [[X:%.*]], ptr [[P:%.*]], align 16
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; CHECK-NEXT: [[LOAD:%.*]] = load <vscale x 4 x i64>, ptr [[P]], align 32
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; CHECK-NEXT: ret <vscale x 4 x i64> [[LOAD]]
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;
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store <vscale x 4 x i32> %x, ptr %p
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%load = load <vscale x 4 x i64>, ptr %p
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ret <vscale x 4 x i64> %load
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}
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define <vscale x 2 x i32> @load_v2i32_store_v4i32_forward_load(ptr %p, <vscale x 4 x i32> %x) {
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; CHECK-LABEL: @load_v2i32_store_v4i32_forward_load(
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; CHECK-NEXT: store <vscale x 4 x i32> [[X:%.*]], ptr [[P:%.*]], align 16
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; CHECK-NEXT: [[LOAD:%.*]] = load <vscale x 2 x i32>, ptr [[P]], align 8
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; CHECK-NEXT: ret <vscale x 2 x i32> [[LOAD]]
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;
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store <vscale x 4 x i32> %x, ptr %p
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%load = load <vscale x 2 x i32>, ptr %p
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ret <vscale x 2 x i32> %load
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}
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define <vscale x 2 x i32> @load_v2i32_store_v4i32_forward_load_offsets(ptr %p, <vscale x 4 x i32> %x) {
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; CHECK-LABEL: @load_v2i32_store_v4i32_forward_load_offsets(
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; CHECK-NEXT: store <vscale x 4 x i32> [[X:%.*]], ptr [[P:%.*]], align 16
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; CHECK-NEXT: [[Q:%.*]] = getelementptr <vscale x 2 x i32>, ptr [[P]], i64 1
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; CHECK-NEXT: [[LOAD:%.*]] = load <vscale x 2 x i32>, ptr [[Q]], align 8
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; CHECK-NEXT: ret <vscale x 2 x i32> [[LOAD]]
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;
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store <vscale x 4 x i32> %x, ptr %p
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%q = getelementptr <vscale x 2 x i32>, ptr %p, i64 1
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%load = load <vscale x 2 x i32>, ptr %q
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ret <vscale x 2 x i32> %load
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}
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define <vscale x 2 x i32> @load_v2i32_store_v4i32_forward_load_offsetc(ptr %p, <vscale x 4 x i32> %x) {
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; CHECK-LABEL: @load_v2i32_store_v4i32_forward_load_offsetc(
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; CHECK-NEXT: store <vscale x 4 x i32> [[X:%.*]], ptr [[P:%.*]], align 16
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; CHECK-NEXT: [[Q:%.*]] = getelementptr <2 x i32>, ptr [[P]], i64 1
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; CHECK-NEXT: [[LOAD:%.*]] = load <vscale x 2 x i32>, ptr [[Q]], align 8
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; CHECK-NEXT: ret <vscale x 2 x i32> [[LOAD]]
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;
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store <vscale x 4 x i32> %x, ptr %p
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%q = getelementptr <2 x i32>, ptr %p, i64 1
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%load = load <vscale x 2 x i32>, ptr %q
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ret <vscale x 2 x i32> %load
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}
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define <vscale x 2 x ptr> @load_v2p0_store_v4i32_forward_load(ptr %p, <vscale x 4 x i32> %x) {
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; CHECK-LABEL: @load_v2p0_store_v4i32_forward_load(
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; CHECK-NEXT: store <vscale x 4 x i32> [[X:%.*]], ptr [[P:%.*]], align 16
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; CHECK-NEXT: [[LOAD:%.*]] = load <vscale x 2 x ptr>, ptr [[P]], align 16
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; CHECK-NEXT: ret <vscale x 2 x ptr> [[LOAD]]
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;
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store <vscale x 4 x i32> %x, ptr %p
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%load = load <vscale x 2 x ptr>, ptr %p
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ret <vscale x 2 x ptr> %load
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}
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define <vscale x 2 x i64> @load_v2i64_store_v2p0_forward_load(ptr %p, <vscale x 2 x ptr> %x) {
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; CHECK-LABEL: @load_v2i64_store_v2p0_forward_load(
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; CHECK-NEXT: store <vscale x 2 x ptr> [[X:%.*]], ptr [[P:%.*]], align 16
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; CHECK-NEXT: [[LOAD:%.*]] = load <vscale x 2 x i64>, ptr [[P]], align 16
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; CHECK-NEXT: ret <vscale x 2 x i64> [[LOAD]]
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;
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store <vscale x 2 x ptr> %x, ptr %p
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%load = load <vscale x 2 x i64>, ptr %p
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ret <vscale x 2 x i64> %load
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}
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define <vscale x 16 x i8> @load_nxv16i8_store_v4i32_forward_load(ptr %p, <4 x i32> %x) {
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; CHECK-LABEL: @load_nxv16i8_store_v4i32_forward_load(
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; CHECK-NEXT: store <4 x i32> [[X:%.*]], ptr [[P:%.*]], align 16
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; CHECK-NEXT: [[LOAD:%.*]] = load <vscale x 16 x i8>, ptr [[P]], align 16
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; CHECK-NEXT: ret <vscale x 16 x i8> [[LOAD]]
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;
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store <4 x i32> %x, ptr %p
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%load = load <vscale x 16 x i8>, ptr %p
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ret <vscale x 16 x i8> %load
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}
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define <16 x i8> @load_v16i8_store_nxv4i32_forward_load(ptr %p, <vscale x 4 x i32> %x) {
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; CHECK-LABEL: @load_v16i8_store_nxv4i32_forward_load(
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; CHECK-NEXT: store <vscale x 4 x i32> [[X:%.*]], ptr [[P:%.*]], align 16
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; CHECK-NEXT: [[LOAD:%.*]] = load <16 x i8>, ptr [[P]], align 16
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; CHECK-NEXT: ret <16 x i8> [[LOAD]]
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;
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store <vscale x 4 x i32> %x, ptr %p
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%load = load <16 x i8>, ptr %p
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ret <16 x i8> %load
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}
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define <vscale x 16 x i8> @load_v16i8_store_v4i32_forward_constant(ptr %p) {
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; CHECK-LABEL: @load_v16i8_store_v4i32_forward_constant(
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; CHECK-NEXT: store <vscale x 4 x i32> splat (i32 4), ptr [[P:%.*]], align 16
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; CHECK-NEXT: [[LOAD:%.*]] = load <vscale x 16 x i8>, ptr [[P]], align 16
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; CHECK-NEXT: ret <vscale x 16 x i8> [[LOAD]]
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;
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store <vscale x 4 x i32> splat (i32 4), ptr %p
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%load = load <vscale x 16 x i8>, ptr %p
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ret <vscale x 16 x i8> %load
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}
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define { <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8> } @bigexample({ <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } %a) vscale_range(1,16) {
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; CHECK-LABEL: @bigexample(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[REF_TMP:%.*]] = alloca { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> }, align 16
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; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 -1, ptr nonnull [[REF_TMP]])
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; CHECK-NEXT: [[A_ELT:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } [[A:%.*]], 0
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; CHECK-NEXT: store <vscale x 4 x i32> [[A_ELT]], ptr [[REF_TMP]], align 16
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; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
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; CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 4
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; CHECK-NEXT: [[REF_TMP_REPACK1:%.*]] = getelementptr inbounds i8, ptr [[REF_TMP]], i64 [[TMP1]]
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; CHECK-NEXT: [[A_ELT2:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } [[A]], 1
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; CHECK-NEXT: store <vscale x 4 x i32> [[A_ELT2]], ptr [[REF_TMP_REPACK1]], align 16
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; CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP0]], 5
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; CHECK-NEXT: [[REF_TMP_REPACK3:%.*]] = getelementptr inbounds i8, ptr [[REF_TMP]], i64 [[TMP3]]
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; CHECK-NEXT: [[A_ELT4:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } [[A]], 2
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; CHECK-NEXT: store <vscale x 4 x i32> [[A_ELT4]], ptr [[REF_TMP_REPACK3]], align 16
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; CHECK-NEXT: [[TMP5:%.*]] = mul i64 [[TMP0]], 48
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; CHECK-NEXT: [[REF_TMP_REPACK5:%.*]] = getelementptr inbounds i8, ptr [[REF_TMP]], i64 [[TMP5]]
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; CHECK-NEXT: [[A_ELT6:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } [[A]], 3
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; CHECK-NEXT: store <vscale x 4 x i32> [[A_ELT6]], ptr [[REF_TMP_REPACK5]], align 16
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; CHECK-NEXT: [[DOTUNPACK:%.*]] = load <vscale x 16 x i8>, ptr [[REF_TMP]], align 16
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; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8> } poison, <vscale x 16 x i8> [[DOTUNPACK]], 0
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; CHECK-NEXT: [[DOTUNPACK8:%.*]] = load <vscale x 16 x i8>, ptr [[REF_TMP_REPACK1]], align 16
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; CHECK-NEXT: [[TMP9:%.*]] = insertvalue { <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8> } [[TMP6]], <vscale x 16 x i8> [[DOTUNPACK8]], 1
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; CHECK-NEXT: [[DOTUNPACK10:%.*]] = load <vscale x 16 x i8>, ptr [[REF_TMP_REPACK3]], align 16
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; CHECK-NEXT: [[TMP12:%.*]] = insertvalue { <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8> } [[TMP9]], <vscale x 16 x i8> [[DOTUNPACK10]], 2
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; CHECK-NEXT: [[DOTUNPACK12:%.*]] = load <vscale x 16 x i8>, ptr [[REF_TMP_REPACK5]], align 16
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; CHECK-NEXT: [[TMP15:%.*]] = insertvalue { <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8> } [[TMP12]], <vscale x 16 x i8> [[DOTUNPACK12]], 3
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; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 -1, ptr nonnull [[REF_TMP]])
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; CHECK-NEXT: ret { <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8> } [[TMP15]]
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;
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entry:
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%ref.tmp = alloca { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> }, align 16
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call void @llvm.lifetime.start.p0(i64 -1, ptr nonnull %ref.tmp)
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%a.elt = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } %a, 0
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store <vscale x 4 x i32> %a.elt, ptr %ref.tmp, align 16
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%0 = call i64 @llvm.vscale.i64()
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%1 = shl i64 %0, 4
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%ref.tmp.repack1 = getelementptr inbounds i8, ptr %ref.tmp, i64 %1
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%a.elt2 = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } %a, 1
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store <vscale x 4 x i32> %a.elt2, ptr %ref.tmp.repack1, align 16
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%2 = call i64 @llvm.vscale.i64()
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%3 = shl i64 %2, 5
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%ref.tmp.repack3 = getelementptr inbounds i8, ptr %ref.tmp, i64 %3
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%a.elt4 = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } %a, 2
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store <vscale x 4 x i32> %a.elt4, ptr %ref.tmp.repack3, align 16
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%4 = call i64 @llvm.vscale.i64()
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%5 = mul i64 %4, 48
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%ref.tmp.repack5 = getelementptr inbounds i8, ptr %ref.tmp, i64 %5
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%a.elt6 = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } %a, 3
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store <vscale x 4 x i32> %a.elt6, ptr %ref.tmp.repack5, align 16
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%.unpack = load <vscale x 16 x i8>, ptr %ref.tmp, align 16
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%6 = insertvalue { <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8> } poison, <vscale x 16 x i8> %.unpack, 0
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%7 = call i64 @llvm.vscale.i64()
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%8 = shl i64 %7, 4
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%.elt7 = getelementptr inbounds i8, ptr %ref.tmp, i64 %8
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%.unpack8 = load <vscale x 16 x i8>, ptr %.elt7, align 16
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%9 = insertvalue { <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8> } %6, <vscale x 16 x i8> %.unpack8, 1
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%10 = call i64 @llvm.vscale.i64()
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%11 = shl i64 %10, 5
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%.elt9 = getelementptr inbounds i8, ptr %ref.tmp, i64 %11
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%.unpack10 = load <vscale x 16 x i8>, ptr %.elt9, align 16
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%12 = insertvalue { <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8> } %9, <vscale x 16 x i8> %.unpack10, 2
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%13 = call i64 @llvm.vscale.i64()
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%14 = mul i64 %13, 48
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%.elt11 = getelementptr inbounds i8, ptr %ref.tmp, i64 %14
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%.unpack12 = load <vscale x 16 x i8>, ptr %.elt11, align 16
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%15 = insertvalue { <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8> } %12, <vscale x 16 x i8> %.unpack12, 3
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call void @llvm.lifetime.end.p0(i64 -1, ptr nonnull %ref.tmp)
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ret { <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8> } %15
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}

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