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[Loads] Also use isAligned when checking assumptions.
Also use isAligned when trying to use alignment and dereferenceable assumptions. This catches cases where dereferencable is known via the assumption but alignment is known via isAligned (e.g. via argument attribute or align of 1)
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2 files changed

+111
-46
lines changed

2 files changed

+111
-46
lines changed

‎llvm/lib/Analysis/Loads.cpp

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -173,9 +173,11 @@ static bool isDereferenceableAndAlignedPointer(
173173

174174
if (CtxI) {
175175
/// Look through assumes to see if both dereferencability and alignment can
176-
/// be provent by an assume
176+
/// be provent by an assume if needed.
177177
RetainedKnowledge AlignRK;
178178
RetainedKnowledge DerefRK;
179+
APInt Offset(DL.getTypeStoreSizeInBits(V->getType()), 0);
180+
bool IsAligned = isAligned(V, Offset, Alignment, DL);
179181
if (getKnowledgeForValue(
180182
V, {Attribute::Dereferenceable, Attribute::Alignment}, AC,
181183
[&](RetainedKnowledge RK, Instruction *Assume, auto) {
@@ -185,8 +187,10 @@ static bool isDereferenceableAndAlignedPointer(
185187
AlignRK = std::max(AlignRK, RK);
186188
if (RK.AttrKind == Attribute::Dereferenceable)
187189
DerefRK = std::max(DerefRK, RK);
188-
if (AlignRK && DerefRK && AlignRK.ArgValue >= Alignment.value() &&
189-
DerefRK.ArgValue >= Size.getZExtValue())
190+
if (!IsAligned && AlignRK &&
191+
AlignRK.ArgValue >= Alignment.value())
192+
return false;
193+
if (DerefRK && DerefRK.ArgValue >= Size.getZExtValue())
190194
return true; // We have found what we needed so we stop looking
191195
return false; // Other assumes may have better information. so
192196
// keep looking

‎llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll

Lines changed: 104 additions & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -899,32 +899,15 @@ define void @deref_assumption_in_preheader_constant_trip_count_align_1(ptr noali
899899
; CHECK: [[VECTOR_PH]]:
900900
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
901901
; CHECK: [[VECTOR_BODY]]:
902-
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE2:.*]] ]
902+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
903903
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0
904904
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[TMP0]]
905905
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 0
906906
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP2]], align 4
907907
; CHECK-NEXT: [[TMP3:%.*]] = icmp sge <2 x i32> [[WIDE_LOAD]], zeroinitializer
908-
; CHECK-NEXT: [[TMP4:%.*]] = xor <2 x i1> [[TMP3]], splat (i1 true)
909-
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i1> [[TMP4]], i32 0
910-
; CHECK-NEXT: br i1 [[TMP5]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]
911-
; CHECK: [[PRED_LOAD_IF]]:
912908
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP0]]
913-
; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 1
914-
; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x i32> poison, i32 [[TMP7]], i32 0
915-
; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE]]
916-
; CHECK: [[PRED_LOAD_CONTINUE]]:
917-
; CHECK-NEXT: [[TMP9:%.*]] = phi <2 x i32> [ poison, %[[VECTOR_BODY]] ], [ [[TMP8]], %[[PRED_LOAD_IF]] ]
918-
; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP4]], i32 1
919-
; CHECK-NEXT: br i1 [[TMP10]], label %[[PRED_LOAD_IF1:.*]], label %[[PRED_LOAD_CONTINUE2]]
920-
; CHECK: [[PRED_LOAD_IF1]]:
921-
; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], 1
922-
; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP11]]
923-
; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 1
924-
; CHECK-NEXT: [[TMP14:%.*]] = insertelement <2 x i32> [[TMP9]], i32 [[TMP13]], i32 1
925-
; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE2]]
926-
; CHECK: [[PRED_LOAD_CONTINUE2]]:
927-
; CHECK-NEXT: [[TMP15:%.*]] = phi <2 x i32> [ [[TMP9]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP14]], %[[PRED_LOAD_IF1]] ]
909+
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i32, ptr [[TMP6]], i32 0
910+
; CHECK-NEXT: [[TMP15:%.*]] = load <2 x i32>, ptr [[TMP5]], align 1
928911
; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP3]], <2 x i32> [[WIDE_LOAD]], <2 x i32> [[TMP15]]
929912
; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[TMP0]]
930913
; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[TMP16]], i32 0
@@ -1089,15 +1072,32 @@ define void @align_and_deref_assumption_in_preheader_constant_trip_count_align_4
10891072
; CHECK: [[VECTOR_PH]]:
10901073
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
10911074
; CHECK: [[VECTOR_BODY]]:
1092-
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
1075+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE2:.*]] ]
10931076
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0
10941077
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[TMP0]]
10951078
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 0
10961079
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP2]], align 4
10971080
; CHECK-NEXT: [[TMP3:%.*]] = icmp sge <2 x i32> [[WIDE_LOAD]], zeroinitializer
1081+
; CHECK-NEXT: [[TMP15:%.*]] = xor <2 x i1> [[TMP3]], splat (i1 true)
1082+
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i1> [[TMP15]], i32 0
1083+
; CHECK-NEXT: br i1 [[TMP5]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]
1084+
; CHECK: [[PRED_LOAD_IF]]:
10981085
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP0]]
1099-
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i32, ptr [[TMP4]], i32 0
1100-
; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <2 x i32>, ptr [[TMP5]], align 4
1086+
; CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP4]], align 4
1087+
; CHECK-NEXT: [[TMP17:%.*]] = insertelement <2 x i32> poison, i32 [[TMP16]], i32 0
1088+
; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE]]
1089+
; CHECK: [[PRED_LOAD_CONTINUE]]:
1090+
; CHECK-NEXT: [[TMP9:%.*]] = phi <2 x i32> [ poison, %[[VECTOR_BODY]] ], [ [[TMP17]], %[[PRED_LOAD_IF]] ]
1091+
; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP15]], i32 1
1092+
; CHECK-NEXT: br i1 [[TMP10]], label %[[PRED_LOAD_IF1:.*]], label %[[PRED_LOAD_CONTINUE2]]
1093+
; CHECK: [[PRED_LOAD_IF1]]:
1094+
; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], 1
1095+
; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP11]]
1096+
; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
1097+
; CHECK-NEXT: [[TMP14:%.*]] = insertelement <2 x i32> [[TMP9]], i32 [[TMP13]], i32 1
1098+
; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE2]]
1099+
; CHECK: [[PRED_LOAD_CONTINUE2]]:
1100+
; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = phi <2 x i32> [ [[TMP9]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP14]], %[[PRED_LOAD_IF1]] ]
11011101
; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP3]], <2 x i32> [[WIDE_LOAD]], <2 x i32> [[WIDE_LOAD1]]
11021102
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[TMP0]]
11031103
; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[TMP6]], i32 0
@@ -1168,32 +1168,93 @@ define void @deref_assumption_in_preheader_constant_trip_count_align_4_known_via
11681168
; CHECK: [[VECTOR_PH]]:
11691169
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
11701170
; CHECK: [[VECTOR_BODY]]:
1171-
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE2:.*]] ]
1171+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
11721172
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0
11731173
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[TMP0]]
11741174
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 0
11751175
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP2]], align 4
11761176
; CHECK-NEXT: [[TMP3:%.*]] = icmp sge <2 x i32> [[WIDE_LOAD]], zeroinitializer
1177-
; CHECK-NEXT: [[TMP4:%.*]] = xor <2 x i1> [[TMP3]], splat (i1 true)
1178-
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i1> [[TMP4]], i32 0
1179-
; CHECK-NEXT: br i1 [[TMP5]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]
1180-
; CHECK: [[PRED_LOAD_IF]]:
11811177
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP0]]
1182-
; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
1183-
; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x i32> poison, i32 [[TMP7]], i32 0
1184-
; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE]]
1185-
; CHECK: [[PRED_LOAD_CONTINUE]]:
1186-
; CHECK-NEXT: [[TMP9:%.*]] = phi <2 x i32> [ poison, %[[VECTOR_BODY]] ], [ [[TMP8]], %[[PRED_LOAD_IF]] ]
1187-
; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP4]], i32 1
1188-
; CHECK-NEXT: br i1 [[TMP10]], label %[[PRED_LOAD_IF1:.*]], label %[[PRED_LOAD_CONTINUE2]]
1189-
; CHECK: [[PRED_LOAD_IF1]]:
1190-
; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], 1
1191-
; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP11]]
1192-
; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
1193-
; CHECK-NEXT: [[TMP14:%.*]] = insertelement <2 x i32> [[TMP9]], i32 [[TMP13]], i32 1
1194-
; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE2]]
1195-
; CHECK: [[PRED_LOAD_CONTINUE2]]:
1196-
; CHECK-NEXT: [[TMP15:%.*]] = phi <2 x i32> [ [[TMP9]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP14]], %[[PRED_LOAD_IF1]] ]
1178+
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i32, ptr [[TMP6]], i32 0
1179+
; CHECK-NEXT: [[TMP15:%.*]] = load <2 x i32>, ptr [[TMP5]], align 4
1180+
; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP3]], <2 x i32> [[WIDE_LOAD]], <2 x i32> [[TMP15]]
1181+
; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[TMP0]]
1182+
; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[TMP16]], i32 0
1183+
; CHECK-NEXT: store <2 x i32> [[PREDPHI]], ptr [[TMP17]], align 4
1184+
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
1185+
; CHECK-NEXT: [[TMP18:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
1186+
; CHECK-NEXT: br i1 [[TMP18]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP24:![0-9]+]]
1187+
; CHECK: [[MIDDLE_BLOCK]]:
1188+
; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[SCALAR_PH]]
1189+
; CHECK: [[SCALAR_PH]]:
1190+
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 1000, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
1191+
; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
1192+
; CHECK: [[LOOP_HEADER]]:
1193+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]
1194+
; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV]]
1195+
; CHECK-NEXT: [[L_B:%.*]] = load i32, ptr [[GEP_B]], align 4
1196+
; CHECK-NEXT: [[C_1:%.*]] = icmp sge i32 [[L_B]], 0
1197+
; CHECK-NEXT: br i1 [[C_1]], label %[[LOOP_LATCH]], label %[[LOOP_THEN:.*]]
1198+
; CHECK: [[LOOP_THEN]]:
1199+
; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr i32, ptr [[A]], i64 [[IV]]
1200+
; CHECK-NEXT: [[L_A:%.*]] = load i32, ptr [[GEP_A]], align 4
1201+
; CHECK-NEXT: br label %[[LOOP_LATCH]]
1202+
; CHECK: [[LOOP_LATCH]]:
1203+
; CHECK-NEXT: [[MERGE:%.*]] = phi i32 [ [[L_A]], %[[LOOP_THEN]] ], [ [[L_B]], %[[LOOP_HEADER]] ]
1204+
; CHECK-NEXT: [[GEP_C:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[IV]]
1205+
; CHECK-NEXT: store i32 [[MERGE]], ptr [[GEP_C]], align 4
1206+
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
1207+
; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 1000
1208+
; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP_HEADER]], !llvm.loop [[LOOP25:![0-9]+]]
1209+
; CHECK: [[EXIT]]:
1210+
; CHECK-NEXT: ret void
1211+
;
1212+
entry:
1213+
call void @llvm.assume(i1 true) [ "dereferenceable"(ptr %a, i64 4000) ]
1214+
br label %loop.header
1215+
1216+
loop.header:
1217+
%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
1218+
%gep.b = getelementptr inbounds i32, ptr %b, i64 %iv
1219+
%l.b = load i32, ptr %gep.b, align 4
1220+
%c.1 = icmp sge i32 %l.b, 0
1221+
br i1 %c.1, label %loop.latch, label %loop.then
1222+
1223+
loop.then:
1224+
%gep.a = getelementptr i32, ptr %a, i64 %iv
1225+
%l.a = load i32, ptr %gep.a, align 4
1226+
br label %loop.latch
1227+
1228+
loop.latch:
1229+
%merge = phi i32 [ %l.a, %loop.then ], [ %l.b, %loop.header ]
1230+
%gep.c = getelementptr inbounds i32, ptr %c, i64 %iv
1231+
store i32 %merge, ptr %gep.c, align 4
1232+
%iv.next = add nuw nsw i64 %iv, 1
1233+
%ec = icmp eq i64 %iv.next, 1000
1234+
br i1 %ec, label %exit, label %loop.header
1235+
1236+
exit:
1237+
ret void
1238+
}
1239+
1240+
define void @deref_assumption_in_preheader_constant_trip_count_align_4_not_known(ptr noalias %a, ptr noalias %b, ptr noalias %c) {
1241+
; CHECK-LABEL: define void @deref_assumption_in_preheader_constant_trip_count_align_4_not_known(
1242+
; CHECK-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) {
1243+
; CHECK-NEXT: [[ENTRY:.*]]:
1244+
; CHECK-NEXT: call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[A]], i64 4000) ]
1245+
; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
1246+
; CHECK: [[VECTOR_PH]]:
1247+
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
1248+
; CHECK: [[VECTOR_BODY]]:
1249+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
1250+
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0
1251+
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[TMP0]]
1252+
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 0
1253+
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP2]], align 4
1254+
; CHECK-NEXT: [[TMP3:%.*]] = icmp sge <2 x i32> [[WIDE_LOAD]], zeroinitializer
1255+
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP0]]
1256+
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i32, ptr [[TMP6]], i32 0
1257+
; CHECK-NEXT: [[TMP15:%.*]] = load <2 x i32>, ptr [[TMP5]], align 4
11971258
; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP3]], <2 x i32> [[WIDE_LOAD]], <2 x i32> [[TMP15]]
11981259
; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[TMP0]]
11991260
; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[TMP16]], i32 0

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