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[CodeGen][NewPM] Port "PrologEpilogInserter" to NPM
1 parent 736205d commit 9b67ac6

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+165
-43
lines changed

llvm/include/llvm/CodeGen/PEI.h

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@@ -0,0 +1,25 @@
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//===- llvm/CodeGen/PEI.h ---------------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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9+
#ifndef LLVM_CODEGEN_PEI_H
10+
#define LLVM_CODEGEN_PEI_H
11+
12+
#include "llvm/CodeGen/MachinePassManager.h"
13+
14+
namespace llvm {
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16+
class PrologEpilogInserterPass
17+
: public PassInfoMixin<PrologEpilogInserterPass> {
18+
public:
19+
PreservedAnalyses run(MachineFunction &MF,
20+
MachineFunctionAnalysisManager &MFAM);
21+
};
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23+
} // namespace llvm
24+
25+
#endif // LLVM_CODEGEN_PEI_H

llvm/include/llvm/InitializePasses.h

Lines changed: 1 addition & 1 deletion
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@@ -222,7 +222,7 @@ void initializeNaryReassociateLegacyPassPass(PassRegistry &);
222222
void initializeObjCARCContractLegacyPassPass(PassRegistry &);
223223
void initializeOptimizationRemarkEmitterWrapperPassPass(PassRegistry &);
224224
void initializeOptimizePHIsLegacyPass(PassRegistry &);
225-
void initializePEIPass(PassRegistry &);
225+
void initializePEILegacyPass(PassRegistry &);
226226
void initializePHIEliminationPass(PassRegistry &);
227227
void initializePartiallyInlineLibCallsLegacyPassPass(PassRegistry &);
228228
void initializePatchableFunctionPass(PassRegistry &);

llvm/include/llvm/Passes/CodeGenPassBuilder.h

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Original file line numberDiff line numberDiff line change
@@ -57,6 +57,7 @@
5757
#include "llvm/CodeGen/MachineSink.h"
5858
#include "llvm/CodeGen/MachineVerifier.h"
5959
#include "llvm/CodeGen/OptimizePHIs.h"
60+
#include "llvm/CodeGen/PEI.h"
6061
#include "llvm/CodeGen/PHIElimination.h"
6162
#include "llvm/CodeGen/PeepholeOptimizer.h"
6263
#include "llvm/CodeGen/PostRASchedulerList.h"

llvm/include/llvm/Passes/MachinePassRegistry.def

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -173,6 +173,7 @@ MACHINE_FUNCTION_PASS("print<machine-post-dom-tree>",
173173
MachinePostDominatorTreePrinterPass(errs()))
174174
MACHINE_FUNCTION_PASS("print<slot-indexes>", SlotIndexesPrinterPass(errs()))
175175
MACHINE_FUNCTION_PASS("print<virtregmap>", VirtRegMapPrinterPass(errs()))
176+
MACHINE_FUNCTION_PASS("prolog-epilog", PrologEpilogInserterPass())
176177
MACHINE_FUNCTION_PASS("reg-usage-collector", RegUsageInfoCollectorPass())
177178
MACHINE_FUNCTION_PASS("reg-usage-propagation", RegUsageInfoPropagationPass())
178179
MACHINE_FUNCTION_PASS("register-coalescer", RegisterCoalescerPass())
@@ -274,7 +275,6 @@ DUMMY_MACHINE_FUNCTION_PASS("patchable-function", PatchableFunctionPass)
274275
DUMMY_MACHINE_FUNCTION_PASS("postra-machine-sink", PostRAMachineSinkingPass)
275276
DUMMY_MACHINE_FUNCTION_PASS("print-machine-uniformity", MachineUniformityInfoPrinterPass)
276277
DUMMY_MACHINE_FUNCTION_PASS("processimpdefs", ProcessImplicitDefsPass)
277-
DUMMY_MACHINE_FUNCTION_PASS("prologepilog", PrologEpilogInserterPass)
278278
DUMMY_MACHINE_FUNCTION_PASS("prologepilog-code", PrologEpilogCodeInserterPass)
279279
DUMMY_MACHINE_FUNCTION_PASS("ra-basic", RABasicPass)
280280
DUMMY_MACHINE_FUNCTION_PASS("ra-pbqp", RAPBQPPass)

llvm/lib/CodeGen/CodeGen.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -101,7 +101,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
101101
initializeMachineVerifierLegacyPassPass(Registry);
102102
initializeObjCARCContractLegacyPassPass(Registry);
103103
initializeOptimizePHIsLegacyPass(Registry);
104-
initializePEIPass(Registry);
104+
initializePEILegacyPass(Registry);
105105
initializePHIEliminationPass(Registry);
106106
initializePatchableFunctionPass(Registry);
107107
initializePeepholeOptimizerLegacyPass(Registry);

llvm/lib/CodeGen/PrologEpilogInserter.cpp

Lines changed: 65 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,7 @@
3636
#include "llvm/CodeGen/MachineOperand.h"
3737
#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
3838
#include "llvm/CodeGen/MachineRegisterInfo.h"
39+
#include "llvm/CodeGen/PEI.h"
3940
#include "llvm/CodeGen/RegisterScavenging.h"
4041
#include "llvm/CodeGen/TargetFrameLowering.h"
4142
#include "llvm/CodeGen/TargetInstrInfo.h"
@@ -77,21 +78,7 @@ STATISTIC(NumFuncSeen, "Number of functions seen in PEI");
7778

7879
namespace {
7980

80-
class PEI : public MachineFunctionPass {
81-
public:
82-
static char ID;
83-
84-
PEI() : MachineFunctionPass(ID) {
85-
initializePEIPass(*PassRegistry::getPassRegistry());
86-
}
87-
88-
void getAnalysisUsage(AnalysisUsage &AU) const override;
89-
90-
/// runOnMachineFunction - Insert prolog/epilog code and replace abstract
91-
/// frame indexes with appropriate references.
92-
bool runOnMachineFunction(MachineFunction &MF) override;
93-
94-
private:
81+
class PEIImpl {
9582
RegScavenger *RS = nullptr;
9683

9784
// MinCSFrameIndex, MaxCSFrameIndex - Keeps the range of callee saved
@@ -137,31 +124,50 @@ class PEI : public MachineFunctionPass {
137124

138125
void insertPrologEpilogCode(MachineFunction &MF);
139126
void insertZeroCallUsedRegs(MachineFunction &MF);
127+
128+
public:
129+
PEIImpl(MachineOptimizationRemarkEmitter *ORE) : ORE(ORE) {}
130+
bool run(MachineFunction &MF);
131+
};
132+
133+
class PEILegacy : public MachineFunctionPass {
134+
public:
135+
static char ID;
136+
137+
PEILegacy() : MachineFunctionPass(ID) {
138+
initializePEILegacyPass(*PassRegistry::getPassRegistry());
139+
}
140+
141+
void getAnalysisUsage(AnalysisUsage &AU) const override;
142+
143+
/// runOnMachineFunction - Insert prolog/epilog code and replace abstract
144+
/// frame indexes with appropriate references.
145+
bool runOnMachineFunction(MachineFunction &MF) override;
140146
};
141147

142148
} // end anonymous namespace
143149

144-
char PEI::ID = 0;
150+
char PEILegacy::ID = 0;
145151

146-
char &llvm::PrologEpilogCodeInserterID = PEI::ID;
152+
char &llvm::PrologEpilogCodeInserterID = PEILegacy::ID;
147153

148-
INITIALIZE_PASS_BEGIN(PEI, DEBUG_TYPE, "Prologue/Epilogue Insertion", false,
149-
false)
154+
INITIALIZE_PASS_BEGIN(PEILegacy, DEBUG_TYPE, "Prologue/Epilogue Insertion",
155+
false, false)
150156
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
151157
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
152158
INITIALIZE_PASS_DEPENDENCY(MachineOptimizationRemarkEmitterPass)
153-
INITIALIZE_PASS_END(PEI, DEBUG_TYPE,
159+
INITIALIZE_PASS_END(PEILegacy, DEBUG_TYPE,
154160
"Prologue/Epilogue Insertion & Frame Finalization", false,
155161
false)
156162

157163
MachineFunctionPass *llvm::createPrologEpilogInserterPass() {
158-
return new PEI();
164+
return new PEILegacy();
159165
}
160166

161167
STATISTIC(NumBytesStackSpace,
162168
"Number of bytes used for stack in all functions");
163169

164-
void PEI::getAnalysisUsage(AnalysisUsage &AU) const {
170+
void PEILegacy::getAnalysisUsage(AnalysisUsage &AU) const {
165171
AU.setPreservesCFG();
166172
AU.addPreserved<MachineLoopInfoWrapperPass>();
167173
AU.addPreserved<MachineDominatorTreeWrapperPass>();
@@ -213,17 +219,14 @@ static void stashEntryDbgValues(MachineBasicBlock &MBB,
213219
MI->removeFromParent();
214220
}
215221

216-
/// runOnMachineFunction - Insert prolog/epilog code and replace abstract
217-
/// frame indexes with appropriate references.
218-
bool PEI::runOnMachineFunction(MachineFunction &MF) {
222+
bool PEIImpl::run(MachineFunction &MF) {
219223
NumFuncSeen++;
220224
const Function &F = MF.getFunction();
221225
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
222226
const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
223227

224228
RS = TRI->requiresRegisterScavenging(MF) ? new RegScavenger() : nullptr;
225229
FrameIndexVirtualScavenging = TRI->requiresFrameIndexScavenging(MF);
226-
ORE = &getAnalysis<MachineOptimizationRemarkEmitterPass>().getORE();
227230

228231
// Spill frame pointer and/or base pointer registers if they are clobbered.
229232
// It is placed before call frame instruction elimination so it will not mess
@@ -354,9 +357,31 @@ bool PEI::runOnMachineFunction(MachineFunction &MF) {
354357
return true;
355358
}
356359

360+
/// runOnMachineFunction - Insert prolog/epilog code and replace abstract
361+
/// frame indexes with appropriate references.
362+
bool PEILegacy::runOnMachineFunction(MachineFunction &MF) {
363+
MachineOptimizationRemarkEmitter *ORE =
364+
&getAnalysis<MachineOptimizationRemarkEmitterPass>().getORE();
365+
return PEIImpl(ORE).run(MF);
366+
}
367+
368+
PreservedAnalyses
369+
PrologEpilogInserterPass::run(MachineFunction &MF,
370+
MachineFunctionAnalysisManager &MFAM) {
371+
MachineOptimizationRemarkEmitter &ORE =
372+
MFAM.getResult<MachineOptimizationRemarkEmitterAnalysis>(MF);
373+
if (!PEIImpl(&ORE).run(MF))
374+
return PreservedAnalyses::all();
375+
376+
return getMachineFunctionPassPreservedAnalyses()
377+
.preserveSet<CFGAnalyses>()
378+
.preserve<MachineDominatorTreeAnalysis>()
379+
.preserve<MachineLoopAnalysis>();
380+
}
381+
357382
/// Calculate the MaxCallFrameSize variable for the function's frame
358383
/// information and eliminate call frame pseudo instructions.
359-
void PEI::calculateCallFrameInfo(MachineFunction &MF) {
384+
void PEIImpl::calculateCallFrameInfo(MachineFunction &MF) {
360385
const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
361386
const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
362387
MachineFrameInfo &MFI = MF.getFrameInfo();
@@ -397,7 +422,7 @@ void PEI::calculateCallFrameInfo(MachineFunction &MF) {
397422

398423
/// Compute the sets of entry and return blocks for saving and restoring
399424
/// callee-saved registers, and placing prolog and epilog code.
400-
void PEI::calculateSaveRestoreBlocks(MachineFunction &MF) {
425+
void PEIImpl::calculateSaveRestoreBlocks(MachineFunction &MF) {
401426
const MachineFrameInfo &MFI = MF.getFrameInfo();
402427

403428
// Even when we do not change any CSR, we still want to insert the
@@ -651,7 +676,7 @@ static void insertCSRRestores(MachineBasicBlock &RestoreBlock,
651676
}
652677
}
653678

654-
void PEI::spillCalleeSavedRegs(MachineFunction &MF) {
679+
void PEIImpl::spillCalleeSavedRegs(MachineFunction &MF) {
655680
// We can't list this requirement in getRequiredProperties because some
656681
// targets (WebAssembly) use virtual registers past this point, and the pass
657682
// pipeline is set up without giving the passes a chance to look at the
@@ -843,7 +868,7 @@ static void AssignProtectedObjSet(const StackObjSet &UnassignedObjs,
843868

844869
/// calculateFrameObjectOffsets - Calculate actual frame offsets for all of the
845870
/// abstract stack objects.
846-
void PEI::calculateFrameObjectOffsets(MachineFunction &MF) {
871+
void PEIImpl::calculateFrameObjectOffsets(MachineFunction &MF) {
847872
const TargetFrameLowering &TFI = *MF.getSubtarget().getFrameLowering();
848873

849874
bool StackGrowsDown =
@@ -1158,7 +1183,7 @@ void PEI::calculateFrameObjectOffsets(MachineFunction &MF) {
11581183
/// insertPrologEpilogCode - Scan the function for modified callee saved
11591184
/// registers, insert spill code for these callee saved registers, then add
11601185
/// prolog and epilog code to the function.
1161-
void PEI::insertPrologEpilogCode(MachineFunction &MF) {
1186+
void PEIImpl::insertPrologEpilogCode(MachineFunction &MF) {
11621187
const TargetFrameLowering &TFI = *MF.getSubtarget().getFrameLowering();
11631188

11641189
// Add prologue to the function...
@@ -1195,7 +1220,7 @@ void PEI::insertPrologEpilogCode(MachineFunction &MF) {
11951220
}
11961221

11971222
/// insertZeroCallUsedRegs - Zero out call used registers.
1198-
void PEI::insertZeroCallUsedRegs(MachineFunction &MF) {
1223+
void PEIImpl::insertZeroCallUsedRegs(MachineFunction &MF) {
11991224
const Function &F = MF.getFunction();
12001225

12011226
if (!F.hasFnAttribute("zero-call-used-regs"))
@@ -1338,7 +1363,7 @@ void PEI::insertZeroCallUsedRegs(MachineFunction &MF) {
13381363

13391364
/// Replace all FrameIndex operands with physical register references and actual
13401365
/// offsets.
1341-
void PEI::replaceFrameIndicesBackward(MachineFunction &MF) {
1366+
void PEIImpl::replaceFrameIndicesBackward(MachineFunction &MF) {
13421367
const TargetFrameLowering &TFI = *MF.getSubtarget().getFrameLowering();
13431368

13441369
for (auto &MBB : MF) {
@@ -1366,7 +1391,7 @@ void PEI::replaceFrameIndicesBackward(MachineFunction &MF) {
13661391

13671392
/// replaceFrameIndices - Replace all MO_FrameIndex operands with physical
13681393
/// register references and actual offsets.
1369-
void PEI::replaceFrameIndices(MachineFunction &MF) {
1394+
void PEIImpl::replaceFrameIndices(MachineFunction &MF) {
13701395
const TargetFrameLowering &TFI = *MF.getSubtarget().getFrameLowering();
13711396

13721397
for (auto &MBB : MF) {
@@ -1382,8 +1407,8 @@ void PEI::replaceFrameIndices(MachineFunction &MF) {
13821407
}
13831408
}
13841409

1385-
bool PEI::replaceFrameIndexDebugInstr(MachineFunction &MF, MachineInstr &MI,
1386-
unsigned OpIdx, int SPAdj) {
1410+
bool PEIImpl::replaceFrameIndexDebugInstr(MachineFunction &MF, MachineInstr &MI,
1411+
unsigned OpIdx, int SPAdj) {
13871412
const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
13881413
const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
13891414
if (MI.isDebugValue()) {
@@ -1464,8 +1489,8 @@ bool PEI::replaceFrameIndexDebugInstr(MachineFunction &MF, MachineInstr &MI,
14641489
return false;
14651490
}
14661491

1467-
void PEI::replaceFrameIndicesBackward(MachineBasicBlock *BB,
1468-
MachineFunction &MF, int &SPAdj) {
1492+
void PEIImpl::replaceFrameIndicesBackward(MachineBasicBlock *BB,
1493+
MachineFunction &MF, int &SPAdj) {
14691494
assert(MF.getSubtarget().getRegisterInfo() &&
14701495
"getRegisterInfo() must be implemented!");
14711496

@@ -1509,8 +1534,8 @@ void PEI::replaceFrameIndicesBackward(MachineBasicBlock *BB,
15091534
}
15101535
}
15111536

1512-
void PEI::replaceFrameIndices(MachineBasicBlock *BB, MachineFunction &MF,
1513-
int &SPAdj) {
1537+
void PEIImpl::replaceFrameIndices(MachineBasicBlock *BB, MachineFunction &MF,
1538+
int &SPAdj) {
15141539
assert(MF.getSubtarget().getRegisterInfo() &&
15151540
"getRegisterInfo() must be implemented!");
15161541
const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();

llvm/lib/Passes/PassBuilder.cpp

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@@ -128,6 +128,7 @@
128128
#include "llvm/CodeGen/MachineTraceMetrics.h"
129129
#include "llvm/CodeGen/MachineVerifier.h"
130130
#include "llvm/CodeGen/OptimizePHIs.h"
131+
#include "llvm/CodeGen/PEI.h"
131132
#include "llvm/CodeGen/PHIElimination.h"
132133
#include "llvm/CodeGen/PeepholeOptimizer.h"
133134
#include "llvm/CodeGen/PostRASchedulerList.h"

llvm/test/CodeGen/AArch64/aarch64-large-stack-spbump.mir

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@@ -1,4 +1,5 @@
11
# RUN: llc -mtriple=aarch64 -run-pass=prologepilog %s -o - | FileCheck %s
2+
# RUN: llc -mtriple=aarch64 -passes='prolog-epilog' %s -o - | FileCheck %s
23
--- |
34
define i32 @_Z4funcv() {
45
entry:

llvm/test/CodeGen/AArch64/aarch64-vector-pcs.mir

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# RUN: llc -mtriple=aarch64-linux-gnu -run-pass=prologepilog %s -o - | FileCheck %s
2+
# RUN: llc -mtriple=aarch64-linux-gnu -passes='prolog-epilog' %s -o - | FileCheck %s
23

34
# The tests below test the allocation of 128bit callee-saves
45
# on the stack, specifically their offsets.

llvm/test/CodeGen/AArch64/framelayout-offset-immediate-change.mir

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@@ -1,4 +1,5 @@
11
# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass=prologepilog %s -o - | FileCheck %s
2+
# RUN: llc -mtriple=aarch64-none-linux-gnu -passes='prolog-epilog' %s -o - | FileCheck %s
23
---
34
name: framelayout_offset_immediate_change
45
tracksRegLiveness: true

llvm/test/CodeGen/AArch64/framelayout-scavengingslot.mir

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@@ -1,4 +1,5 @@
11
# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass=prologepilog %s -o - | FileCheck %s
2+
# RUN: llc -mtriple=aarch64-none-linux-gnu -passes='prolog-epilog' %s -o - | FileCheck %s
23
---
34
# This test verifies that the emergency scavenging slot is located near
45
# the SP when the stack is realigned.

llvm/test/CodeGen/AArch64/framelayout-sve-basepointer.mir

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@@ -1,4 +1,5 @@
11
# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass=prologepilog %s -o - | FileCheck %s
2+
# RUN: llc -mtriple=aarch64-none-linux-gnu -passes='prolog-epilog' %s -o - | FileCheck %s
23
--- |
34
define void @hasBasepointer() #0 { ret void }
45
define void @hasBasepointer_sme_streaming() #1 { ret void }

llvm/test/CodeGen/AArch64/framelayout-sve-scavengingslot.mir

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@@ -1,4 +1,5 @@
11
# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass=prologepilog -mattr=+sve %s -o - | FileCheck %s
2+
# RUN: llc -mtriple=aarch64-none-linux-gnu -passes='prolog-epilog' -mattr=+sve %s -o - | FileCheck %s
23
---
34
# This test verifies that the emergency scavenging slot is located near the SP/BP.
45
name: LateScavengingSlot

llvm/test/CodeGen/AArch64/framelayout-sve.mir

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@@ -1,4 +1,5 @@
11
# RUN: llc -mattr=+sve -mtriple=aarch64-none-linux-gnu -run-pass=prologepilog %s -o - | FileCheck %s
2+
# RUN: llc -mattr=+sve -mtriple=aarch64-none-linux-gnu -passes='prolog-epilog' %s -o - | FileCheck %s
23
# RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+sve -start-before=prologepilog %s -o - | FileCheck %s --check-prefix=ASM
34
# RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+sve -start-before=prologepilog %s -filetype=obj -o %t
45
# RUN: llvm-objdump --dwarf=frames %t | FileCheck %s --check-prefix=UNWINDINFO

llvm/test/CodeGen/AArch64/reg-scavenge-frame.mir

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@@ -1,4 +1,5 @@
11
# RUN: llc -run-pass=prologepilog -verify-machineinstrs %s -o - | FileCheck %s
2+
# RUN: llc -passes='prolog-epilog' %s -o - | FileCheck %s
23

34
--- |
45
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"

llvm/test/CodeGen/AArch64/settag-merge.mir

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@@ -1,4 +1,5 @@
11
# RUN: llc -mtriple=aarch64 -mattr=+mte -run-pass=prologepilog %s -o - | FileCheck %s
2+
# RUN: llc -mtriple=aarch64 -mattr=+mte -passes='prolog-epilog' %s -o - | FileCheck %s
23

34
--- |
45
declare void @llvm.aarch64.settag(ptr nocapture writeonly, i64) argmemonly nounwind writeonly "target-features"="+mte"

llvm/test/CodeGen/AArch64/spill-stack-realignment.mir

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@@ -1,4 +1,5 @@
11
# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass=prologepilog %s -o - | FileCheck %s
2+
# RUN: llc -mtriple=aarch64-none-linux-gnu -passes='prolog-epilog' %s -o - | FileCheck %s
23

34
# Ensure references to scavenged stack slots in the CSR area use the
45
# FP as a base when the stack pointer must be aligned to something

llvm/test/CodeGen/AArch64/stack-id-pei-alloc.mir

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@@ -1,4 +1,5 @@
11
# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass=prologepilog %s -o - | FileCheck %s
2+
# RUN: llc -mtriple=aarch64-none-linux-gnu -passes='prolog-epilog' %s -o - | FileCheck %s
23
...
34
# Ensure that objects with StackID > 0 are not allocated on the default stack
45
# (will not be allocated an offset) and are not considered in the calculation of

llvm/test/CodeGen/AArch64/stack-probing-last-in-block.mir

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@@ -1,5 +1,6 @@
11
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
22
# RUN: llc -run-pass=prologepilog %s -o - | FileCheck %s
3+
# RUN: llc -passes='prolog-epilog' %s -o - | FileCheck %s
34
# Regression test for a crash when the probing instruction
45
# to replace is last in the block.
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--- |

llvm/test/CodeGen/AArch64/stack-tagging-epilogue-fold.mir

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc -mtriple=aarch64 -mattr=+mte -run-pass=prologepilog %s -o - | FileCheck %s
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# RUN: llc -mtriple=aarch64 -mattr=+mte -passes='prolog-epilog' %s -o - | FileCheck %s
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target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"

llvm/test/CodeGen/AArch64/stack-tagging-merge-past-memcpy.mir

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc -mtriple=aarch64 -mattr=+mte -run-pass=prologepilog %s -o - | FileCheck %s
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# RUN: llc -mtriple=aarch64 -mattr=+mte -passes='prolog-epilog' %s -o - | FileCheck %s
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target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"
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target triple = "aarch64-unknown-none-elf"

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