fix: review

Author: woruyu

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

@@ -13007,7 +13007,7 @@ static SDValue combineVSelectWithAllOnesOrZeros(SDValue Cond, SDValue TVal,
   bool IsFAllOne = ISD::isBuildVectorAllOnes(FVal.getNode());
 
   // no vselect(cond, 0/-1, X) or vselect(cond, X, 0/-1), return
-  if (!(IsTAllZero || IsTAllOne || IsFAllZero || IsFAllOne))
+  if (!IsTAllZero && !IsTAllOne && !IsFAllZero && !IsFAllOne)
     return SDValue();
 
   // select Cond, 0, 0 → 0
@@ -13024,6 +13024,10 @@ static SDValue combineVSelectWithAllOnesOrZeros(SDValue Cond, SDValue TVal,
   if (CondVT.getScalarSizeInBits() != VT.getScalarSizeInBits())
     return SDValue();
 
+  // Cond value must be 'sign splat' to be converted to a logical op.
+  if (DAG.ComputeNumSignBits(Cond) != CondVT.getScalarSizeInBits())
+    return SDValue();
+
   // Try inverting Cond and swapping T/F if it gives all-ones/all-zeros form
   if (!IsTAllOne && !IsFAllZero && Cond.hasOneUse() &&
       Cond.getOpcode() == ISD::SETCC &&
@@ -13041,10 +13045,6 @@ static SDValue combineVSelectWithAllOnesOrZeros(SDValue Cond, SDValue TVal,
     }
   }
 
-  // Cond value must be 'sign splat' to be converted to a logical op.
-  if (DAG.ComputeNumSignBits(Cond) != CondVT.getScalarSizeInBits())
-    return SDValue();
-
   // select Cond, -1, 0 → bitcast Cond
   if (IsTAllOne && IsFAllZero)
     return DAG.getBitcast(VT, Cond);

llvm/test/CodeGen/Mips/msa/compare_float.ll

@@ -1,6 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=mips-elf -mattr=+msa,+fp64,+mips32r2 < %s | FileCheck %s --check-prefixes=CHECK,MIPS
-; RUN: llc -mtriple=mipsel-elf -mattr=+msa,+fp64,+mips32r2 < %s | FileCheck %s --check-prefixes=CHECK,MIPSEL
+; RUN: llc -mtriple=mips-elf -mattr=+msa,+fp64,+mips32r2 < %s | FileCheck %s
 
 declare <4 x float> @llvm.mips.fmax.w(<4 x float>, <4 x float>) nounwind
 declare <2 x double> @llvm.mips.fmax.d(<2 x double>, <2 x double>) nounwind
@@ -618,6 +617,3 @@ define void @min_v2f64(ptr %c, ptr %a, ptr %b) nounwind {
   store <2 x double> %3, ptr %c
   ret void
 }
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; MIPS: {{.*}}
-; MIPSEL: {{.*}}