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[PowerPC] Fixup tests for no libcalls for copysignl
1 parent 154d8c9 commit 9df9c96

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3 files changed

+170
-147
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3 files changed

+170
-147
lines changed

‎llvm/test/CodeGen/PowerPC/copysignl.ll

Lines changed: 45 additions & 60 deletions
Original file line numberDiff line numberDiff line change
@@ -43,31 +43,26 @@ declare double @copysign(double, double) #0
4343
define ppc_fp128 @foo_ll(double %a, ppc_fp128 %b) #0 {
4444
; CHECK-LABEL: foo_ll:
4545
; CHECK: # %bb.0: # %entry
46-
; CHECK-NEXT: mflr 0
47-
; CHECK-NEXT: stdu 1, -112(1)
48-
; CHECK-NEXT: fmr 3, 2
49-
; CHECK-NEXT: addis 3, 2, .LCPI2_0@toc@ha
50-
; CHECK-NEXT: std 0, 128(1)
51-
; CHECK-NEXT: lfs 2, .LCPI2_0@toc@l(3)
52-
; CHECK-NEXT: bl copysignl
53-
; CHECK-NEXT: nop
54-
; CHECK-NEXT: addi 1, 1, 112
55-
; CHECK-NEXT: ld 0, 16(1)
56-
; CHECK-NEXT: mtlr 0
46+
; CHECK-NEXT: fcpsgn 0, 2, 1
47+
; CHECK-NEXT: li 3, 0
48+
; CHECK-NEXT: li 4, 8
49+
; CHECK-NEXT: fcmpu 0, 1, 0
50+
; CHECK-NEXT: fmr 1, 0
51+
; CHECK-NEXT: iseleq 3, 4, 3
52+
; CHECK-NEXT: addis 4, 2, .LCPI2_0@toc@ha
53+
; CHECK-NEXT: addi 4, 4, .LCPI2_0@toc@l
54+
; CHECK-NEXT: lfdx 2, 4, 3
5755
; CHECK-NEXT: blr
5856
;
5957
; CHECK-VSX-LABEL: foo_ll:
6058
; CHECK-VSX: # %bb.0: # %entry
61-
; CHECK-VSX-NEXT: mflr 0
62-
; CHECK-VSX-NEXT: stdu 1, -112(1)
63-
; CHECK-VSX-NEXT: fmr 3, 2
59+
; CHECK-VSX-NEXT: fmr 0, 1
60+
; CHECK-VSX-NEXT: xscpsgndp 1, 2, 1
6461
; CHECK-VSX-NEXT: xxlxor 2, 2, 2
65-
; CHECK-VSX-NEXT: std 0, 128(1)
66-
; CHECK-VSX-NEXT: bl copysignl
67-
; CHECK-VSX-NEXT: nop
68-
; CHECK-VSX-NEXT: addi 1, 1, 112
69-
; CHECK-VSX-NEXT: ld 0, 16(1)
70-
; CHECK-VSX-NEXT: mtlr 0
62+
; CHECK-VSX-NEXT: xscmpudp 0, 0, 1
63+
; CHECK-VSX-NEXT: beqlr 0
64+
; CHECK-VSX-NEXT: # %bb.1: # %entry
65+
; CHECK-VSX-NEXT: xsnegdp 2, 2
7166
; CHECK-VSX-NEXT: blr
7267
entry:
7368
%conv = fpext double %a to ppc_fp128
@@ -78,31 +73,26 @@ entry:
7873
define ppc_fp128 @foo_ld(double %a, double %b) #0 {
7974
; CHECK-LABEL: foo_ld:
8075
; CHECK: # %bb.0: # %entry
81-
; CHECK-NEXT: mflr 0
82-
; CHECK-NEXT: stdu 1, -112(1)
83-
; CHECK-NEXT: fmr 3, 2
84-
; CHECK-NEXT: addis 3, 2, .LCPI3_0@toc@ha
85-
; CHECK-NEXT: std 0, 128(1)
86-
; CHECK-NEXT: lfs 2, .LCPI3_0@toc@l(3)
87-
; CHECK-NEXT: bl copysignl
88-
; CHECK-NEXT: nop
89-
; CHECK-NEXT: addi 1, 1, 112
90-
; CHECK-NEXT: ld 0, 16(1)
91-
; CHECK-NEXT: mtlr 0
76+
; CHECK-NEXT: fcpsgn 0, 2, 1
77+
; CHECK-NEXT: li 3, 0
78+
; CHECK-NEXT: li 4, 8
79+
; CHECK-NEXT: fcmpu 0, 1, 0
80+
; CHECK-NEXT: fmr 1, 0
81+
; CHECK-NEXT: iseleq 3, 4, 3
82+
; CHECK-NEXT: addis 4, 2, .LCPI3_0@toc@ha
83+
; CHECK-NEXT: addi 4, 4, .LCPI3_0@toc@l
84+
; CHECK-NEXT: lfdx 2, 4, 3
9285
; CHECK-NEXT: blr
9386
;
9487
; CHECK-VSX-LABEL: foo_ld:
9588
; CHECK-VSX: # %bb.0: # %entry
96-
; CHECK-VSX-NEXT: mflr 0
97-
; CHECK-VSX-NEXT: stdu 1, -112(1)
98-
; CHECK-VSX-NEXT: fmr 3, 2
89+
; CHECK-VSX-NEXT: fmr 0, 1
90+
; CHECK-VSX-NEXT: xscpsgndp 1, 2, 1
9991
; CHECK-VSX-NEXT: xxlxor 2, 2, 2
100-
; CHECK-VSX-NEXT: std 0, 128(1)
101-
; CHECK-VSX-NEXT: bl copysignl
102-
; CHECK-VSX-NEXT: nop
103-
; CHECK-VSX-NEXT: addi 1, 1, 112
104-
; CHECK-VSX-NEXT: ld 0, 16(1)
105-
; CHECK-VSX-NEXT: mtlr 0
92+
; CHECK-VSX-NEXT: xscmpudp 0, 0, 1
93+
; CHECK-VSX-NEXT: beqlr 0
94+
; CHECK-VSX-NEXT: # %bb.1: # %entry
95+
; CHECK-VSX-NEXT: xsnegdp 2, 2
10696
; CHECK-VSX-NEXT: blr
10797
entry:
10898
%conv = fpext double %a to ppc_fp128
@@ -114,31 +104,26 @@ entry:
114104
define ppc_fp128 @foo_lf(double %a, float %b) #0 {
115105
; CHECK-LABEL: foo_lf:
116106
; CHECK: # %bb.0: # %entry
117-
; CHECK-NEXT: mflr 0
118-
; CHECK-NEXT: stdu 1, -112(1)
119-
; CHECK-NEXT: fmr 3, 2
120-
; CHECK-NEXT: addis 3, 2, .LCPI4_0@toc@ha
121-
; CHECK-NEXT: std 0, 128(1)
122-
; CHECK-NEXT: lfs 2, .LCPI4_0@toc@l(3)
123-
; CHECK-NEXT: bl copysignl
124-
; CHECK-NEXT: nop
125-
; CHECK-NEXT: addi 1, 1, 112
126-
; CHECK-NEXT: ld 0, 16(1)
127-
; CHECK-NEXT: mtlr 0
107+
; CHECK-NEXT: fcpsgn 0, 2, 1
108+
; CHECK-NEXT: li 3, 0
109+
; CHECK-NEXT: li 4, 8
110+
; CHECK-NEXT: fcmpu 0, 1, 0
111+
; CHECK-NEXT: fmr 1, 0
112+
; CHECK-NEXT: iseleq 3, 4, 3
113+
; CHECK-NEXT: addis 4, 2, .LCPI4_0@toc@ha
114+
; CHECK-NEXT: addi 4, 4, .LCPI4_0@toc@l
115+
; CHECK-NEXT: lfdx 2, 4, 3
128116
; CHECK-NEXT: blr
129117
;
130118
; CHECK-VSX-LABEL: foo_lf:
131119
; CHECK-VSX: # %bb.0: # %entry
132-
; CHECK-VSX-NEXT: mflr 0
133-
; CHECK-VSX-NEXT: stdu 1, -112(1)
134-
; CHECK-VSX-NEXT: fmr 3, 2
120+
; CHECK-VSX-NEXT: fmr 0, 1
121+
; CHECK-VSX-NEXT: fcpsgn 1, 2, 1
135122
; CHECK-VSX-NEXT: xxlxor 2, 2, 2
136-
; CHECK-VSX-NEXT: std 0, 128(1)
137-
; CHECK-VSX-NEXT: bl copysignl
138-
; CHECK-VSX-NEXT: nop
139-
; CHECK-VSX-NEXT: addi 1, 1, 112
140-
; CHECK-VSX-NEXT: ld 0, 16(1)
141-
; CHECK-VSX-NEXT: mtlr 0
123+
; CHECK-VSX-NEXT: xscmpudp 0, 0, 1
124+
; CHECK-VSX-NEXT: beqlr 0
125+
; CHECK-VSX-NEXT: # %bb.1: # %entry
126+
; CHECK-VSX-NEXT: xsnegdp 2, 2
142127
; CHECK-VSX-NEXT: blr
143128
entry:
144129
%conv = fpext double %a to ppc_fp128

‎llvm/test/CodeGen/PowerPC/ctrloop-cpsgn.ll

Lines changed: 74 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,83 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
12
; RUN: llc -verify-machineinstrs < %s -mcpu=ppc | FileCheck %s
23

4+
; Previously we checked that loops that used CTR would not be used around a libm call to copysignl
5+
; but now that copysignl is no longer emitted by LLVM in most cases, this stands as a tombstone.
6+
37
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"
48
target triple = "powerpc-unknown-linux-gnu"
59

610
define ppc_fp128 @foo(ptr nocapture %n, ppc_fp128 %d) nounwind readonly {
11+
; CHECK-LABEL: foo:
12+
; CHECK: # %bb.0: # %entry
13+
; CHECK-NEXT: stwu 1, -112(1)
14+
; CHECK-NEXT: stfd 2, 80(1)
15+
; CHECK-NEXT: li 3, 2048
16+
; CHECK-NEXT: lwz 4, 84(1)
17+
; CHECK-NEXT: stfd 1, 88(1)
18+
; CHECK-NEXT: stw 4, 100(1)
19+
; CHECK-NEXT: lwz 4, 80(1)
20+
; CHECK-NEXT: stw 4, 96(1)
21+
; CHECK-NEXT: lwz 4, 92(1)
22+
; CHECK-NEXT: lfd 1, 96(1)
23+
; CHECK-NEXT: stw 4, 108(1)
24+
; CHECK-NEXT: lwz 4, 88(1)
25+
; CHECK-NEXT: stw 4, 104(1)
26+
; CHECK-NEXT: lfd 0, 104(1)
27+
; CHECK-NEXT: mtctr 3
28+
; CHECK-NEXT: fmr 2, 0
29+
; CHECK-NEXT: b .LBB0_2
30+
; CHECK-NEXT: .LBB0_1: # %for.body
31+
; CHECK-NEXT: #
32+
; CHECK-NEXT: lwz 3, 60(1)
33+
; CHECK-NEXT: stfd 1, 48(1)
34+
; CHECK-NEXT: stw 3, 76(1)
35+
; CHECK-NEXT: lwz 3, 56(1)
36+
; CHECK-NEXT: stw 3, 72(1)
37+
; CHECK-NEXT: lwz 3, 52(1)
38+
; CHECK-NEXT: lfd 2, 72(1)
39+
; CHECK-NEXT: stw 3, 68(1)
40+
; CHECK-NEXT: lwz 3, 48(1)
41+
; CHECK-NEXT: stw 3, 64(1)
42+
; CHECK-NEXT: lfd 1, 64(1)
43+
; CHECK-NEXT: bdz .LBB0_7
44+
; CHECK-NEXT: .LBB0_2: # %for.body
45+
; CHECK-NEXT: #
46+
; CHECK-NEXT: stfd 0, 40(1)
47+
; CHECK-NEXT: lbz 3, 40(1)
48+
; CHECK-NEXT: srwi 3, 3, 7
49+
; CHECK-NEXT: andi. 3, 3, 1
50+
; CHECK-NEXT: bc 12, 1, .LBB0_4
51+
; CHECK-NEXT: # %bb.3: # %for.body
52+
; CHECK-NEXT: #
53+
; CHECK-NEXT: fabs 3, 2
54+
; CHECK-NEXT: b .LBB0_5
55+
; CHECK-NEXT: .LBB0_4:
56+
; CHECK-NEXT: fnabs 3, 2
57+
; CHECK-NEXT: .LBB0_5: # %for.body
58+
; CHECK-NEXT: #
59+
; CHECK-NEXT: fcmpu 0, 2, 3
60+
; CHECK-NEXT: stfd 3, 56(1)
61+
; CHECK-NEXT: beq 0, .LBB0_1
62+
; CHECK-NEXT: # %bb.6: # %for.body
63+
; CHECK-NEXT: #
64+
; CHECK-NEXT: fneg 1, 1
65+
; CHECK-NEXT: b .LBB0_1
66+
; CHECK-NEXT: .LBB0_7: # %for.end
67+
; CHECK-NEXT: stfd 2, 16(1)
68+
; CHECK-NEXT: lwz 3, 20(1)
69+
; CHECK-NEXT: stfd 1, 8(1)
70+
; CHECK-NEXT: stw 3, 36(1)
71+
; CHECK-NEXT: lwz 3, 16(1)
72+
; CHECK-NEXT: stw 3, 32(1)
73+
; CHECK-NEXT: lwz 3, 12(1)
74+
; CHECK-NEXT: lfd 1, 32(1)
75+
; CHECK-NEXT: stw 3, 28(1)
76+
; CHECK-NEXT: lwz 3, 8(1)
77+
; CHECK-NEXT: stw 3, 24(1)
78+
; CHECK-NEXT: lfd 2, 24(1)
79+
; CHECK-NEXT: addi 1, 1, 112
80+
; CHECK-NEXT: blr
781
entry:
882
br label %for.body
983

‎llvm/test/CodeGen/PowerPC/fp128-bitcast-after-operation.ll

Lines changed: 51 additions & 87 deletions
Original file line numberDiff line numberDiff line change
@@ -89,100 +89,59 @@ entry:
8989
}
9090

9191
define i128 @test_copysign(ppc_fp128 %x, ppc_fp128 %y) nounwind {
92-
; PPC64-P8-LE-LABEL: test_copysign:
93-
; PPC64-P8-LE: # %bb.0: # %entry
94-
; PPC64-P8-LE-NEXT: mflr 0
95-
; PPC64-P8-LE-NEXT: stdu 1, -32(1)
96-
; PPC64-P8-LE-NEXT: std 0, 48(1)
97-
; PPC64-P8-LE-NEXT: bl copysignl
98-
; PPC64-P8-LE-NEXT: nop
99-
; PPC64-P8-LE-NEXT: mffprd 3, 1
100-
; PPC64-P8-LE-NEXT: mffprd 4, 2
101-
; PPC64-P8-LE-NEXT: addi 1, 1, 32
102-
; PPC64-P8-LE-NEXT: ld 0, 16(1)
103-
; PPC64-P8-LE-NEXT: mtlr 0
104-
; PPC64-P8-LE-NEXT: blr
105-
;
106-
; PPC64-LE-LABEL: test_copysign:
107-
; PPC64-LE: # %bb.0: # %entry
108-
; PPC64-LE-NEXT: mflr 0
109-
; PPC64-LE-NEXT: stdu 1, -48(1)
110-
; PPC64-LE-NEXT: std 0, 64(1)
111-
; PPC64-LE-NEXT: bl copysignl
112-
; PPC64-LE-NEXT: nop
113-
; PPC64-LE-NEXT: stfd 1, 32(1)
114-
; PPC64-LE-NEXT: stfd 2, 40(1)
115-
; PPC64-LE-NEXT: ld 3, 32(1)
116-
; PPC64-LE-NEXT: ld 4, 40(1)
117-
; PPC64-LE-NEXT: addi 1, 1, 48
118-
; PPC64-LE-NEXT: ld 0, 16(1)
119-
; PPC64-LE-NEXT: mtlr 0
120-
; PPC64-LE-NEXT: blr
121-
;
122-
; PPC64-P8-BE-LABEL: test_copysign:
123-
; PPC64-P8-BE: # %bb.0: # %entry
124-
; PPC64-P8-BE-NEXT: mflr 0
125-
; PPC64-P8-BE-NEXT: stdu 1, -112(1)
126-
; PPC64-P8-BE-NEXT: std 0, 128(1)
127-
; PPC64-P8-BE-NEXT: bl copysignl
128-
; PPC64-P8-BE-NEXT: nop
129-
; PPC64-P8-BE-NEXT: mffprd 3, 1
130-
; PPC64-P8-BE-NEXT: mffprd 4, 2
131-
; PPC64-P8-BE-NEXT: addi 1, 1, 112
132-
; PPC64-P8-BE-NEXT: ld 0, 16(1)
133-
; PPC64-P8-BE-NEXT: mtlr 0
134-
; PPC64-P8-BE-NEXT: blr
92+
; PPC64-P8-LABEL: test_copysign:
93+
; PPC64-P8: # %bb.0: # %entry
94+
; PPC64-P8-NEXT: xscpsgndp 0, 3, 1
95+
; PPC64-P8-NEXT: xscmpudp 0, 1, 0
96+
; PPC64-P8-NEXT: beq 0, .LBB2_2
97+
; PPC64-P8-NEXT: # %bb.1: # %entry
98+
; PPC64-P8-NEXT: xsnegdp 2, 2
99+
; PPC64-P8-NEXT: .LBB2_2: # %entry
100+
; PPC64-P8-NEXT: mffprd 3, 0
101+
; PPC64-P8-NEXT: mffprd 4, 2
102+
; PPC64-P8-NEXT: blr
135103
;
136-
; PPC64-BE-LABEL: test_copysign:
137-
; PPC64-BE: # %bb.0: # %entry
138-
; PPC64-BE-NEXT: mflr 0
139-
; PPC64-BE-NEXT: stdu 1, -128(1)
140-
; PPC64-BE-NEXT: std 0, 144(1)
141-
; PPC64-BE-NEXT: bl copysignl
142-
; PPC64-BE-NEXT: nop
143-
; PPC64-BE-NEXT: stfd 1, 112(1)
144-
; PPC64-BE-NEXT: stfd 2, 120(1)
145-
; PPC64-BE-NEXT: ld 3, 112(1)
146-
; PPC64-BE-NEXT: ld 4, 120(1)
147-
; PPC64-BE-NEXT: addi 1, 1, 128
148-
; PPC64-BE-NEXT: ld 0, 16(1)
149-
; PPC64-BE-NEXT: mtlr 0
150-
; PPC64-BE-NEXT: blr
104+
; PPC64-LABEL: test_copysign:
105+
; PPC64: # %bb.0: # %entry
106+
; PPC64-NEXT: xscpsgndp 0, 3, 1
107+
; PPC64-NEXT: xscmpudp 0, 1, 0
108+
; PPC64-NEXT: beq 0, .LBB2_2
109+
; PPC64-NEXT: # %bb.1: # %entry
110+
; PPC64-NEXT: xsnegdp 2, 2
111+
; PPC64-NEXT: .LBB2_2: # %entry
112+
; PPC64-NEXT: stfd 0, -16(1)
113+
; PPC64-NEXT: stfd 2, -8(1)
114+
; PPC64-NEXT: ld 3, -16(1)
115+
; PPC64-NEXT: ld 4, -8(1)
116+
; PPC64-NEXT: blr
151117
;
152118
; PPC32-LABEL: test_copysign:
153119
; PPC32: # %bb.0: # %entry
154-
; PPC32-NEXT: mflr 0
155-
; PPC32-NEXT: stwu 1, -80(1)
156-
; PPC32-NEXT: stw 0, 84(1)
157-
; PPC32-NEXT: stfd 1, 32(1)
158-
; PPC32-NEXT: lwz 3, 36(1)
159-
; PPC32-NEXT: stfd 2, 24(1)
160-
; PPC32-NEXT: stw 3, 52(1)
161-
; PPC32-NEXT: lwz 3, 32(1)
162-
; PPC32-NEXT: stfd 3, 56(1)
163-
; PPC32-NEXT: stw 3, 48(1)
164-
; PPC32-NEXT: lwz 3, 28(1)
165-
; PPC32-NEXT: lfd 4, 64(1)
166-
; PPC32-NEXT: stw 3, 44(1)
167-
; PPC32-NEXT: lwz 3, 24(1)
168-
; PPC32-NEXT: lfd 1, 48(1)
169-
; PPC32-NEXT: stw 3, 40(1)
170-
; PPC32-NEXT: lwz 3, 60(1)
171-
; PPC32-NEXT: lfd 2, 40(1)
172-
; PPC32-NEXT: stw 3, 76(1)
173-
; PPC32-NEXT: lwz 3, 56(1)
174-
; PPC32-NEXT: stw 3, 72(1)
175-
; PPC32-NEXT: lfd 3, 72(1)
176-
; PPC32-NEXT: bl copysignl
177-
; PPC32-NEXT: stfd 1, 8(1)
120+
; PPC32-NEXT: stwu 1, -32(1)
121+
; PPC32-NEXT: stfd 3, 8(1)
122+
; PPC32-NEXT: lbz 3, 8(1)
123+
; PPC32-NEXT: srwi 3, 3, 7
124+
; PPC32-NEXT: andi. 3, 3, 1
125+
; PPC32-NEXT: bc 12, 1, .LBB2_2
126+
; PPC32-NEXT: # %bb.1: # %entry
127+
; PPC32-NEXT: fabs 0, 1
128+
; PPC32-NEXT: fcmpu 0, 1, 0
129+
; PPC32-NEXT: bne 0, .LBB2_3
130+
; PPC32-NEXT: b .LBB2_4
131+
; PPC32-NEXT: .LBB2_2:
132+
; PPC32-NEXT: fnabs 0, 1
133+
; PPC32-NEXT: fcmpu 0, 1, 0
134+
; PPC32-NEXT: beq 0, .LBB2_4
135+
; PPC32-NEXT: .LBB2_3: # %entry
136+
; PPC32-NEXT: fneg 2, 2
137+
; PPC32-NEXT: .LBB2_4: # %entry
138+
; PPC32-NEXT: stfd 0, 24(1)
178139
; PPC32-NEXT: stfd 2, 16(1)
179-
; PPC32-NEXT: lwz 3, 8(1)
180-
; PPC32-NEXT: lwz 4, 12(1)
140+
; PPC32-NEXT: lwz 3, 24(1)
141+
; PPC32-NEXT: lwz 4, 28(1)
181142
; PPC32-NEXT: lwz 5, 16(1)
182143
; PPC32-NEXT: lwz 6, 20(1)
183-
; PPC32-NEXT: lwz 0, 84(1)
184-
; PPC32-NEXT: addi 1, 1, 80
185-
; PPC32-NEXT: mtlr 0
144+
; PPC32-NEXT: addi 1, 1, 32
186145
; PPC32-NEXT: blr
187146
entry:
188147
%0 = tail call ppc_fp128 @llvm.copysign.ppcf128(ppc_fp128 %x, ppc_fp128 %y)
@@ -236,3 +195,8 @@ entry:
236195

237196
declare ppc_fp128 @llvm.fabs.ppcf128(ppc_fp128)
238197
declare ppc_fp128 @llvm.copysign.ppcf128(ppc_fp128, ppc_fp128)
198+
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
199+
; PPC64-BE: {{.*}}
200+
; PPC64-LE: {{.*}}
201+
; PPC64-P8-BE: {{.*}}
202+
; PPC64-P8-LE: {{.*}}

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