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[MIR] Serialize MachineFrameInfo::isCalleeSavedInfoValid()
In case of functions without a stack frame no "stack" field is serialized into MIR which leads to isCalleeSavedInfoValid being false when reading a MIR file back in. To fix this we should serialize MachineFrameInfo::isCalleeSavedInfoValid() into MIR.
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5 files changed

+166
-1
lines changed

5 files changed

+166
-1
lines changed

‎llvm/include/llvm/CodeGen/MIRYamlMapping.h

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -640,6 +640,7 @@ struct MachineFrameInfo {
640640
bool HasVAStart = false;
641641
bool HasMustTailInVarArgFunc = false;
642642
bool HasTailCall = false;
643+
bool IsCalleeSavedInfoValid = false;
643644
unsigned LocalFrameSize = 0;
644645
StringValue SavePoint;
645646
StringValue RestorePoint;
@@ -663,7 +664,8 @@ struct MachineFrameInfo {
663664
HasMustTailInVarArgFunc == Other.HasMustTailInVarArgFunc &&
664665
HasTailCall == Other.HasTailCall &&
665666
LocalFrameSize == Other.LocalFrameSize &&
666-
SavePoint == Other.SavePoint && RestorePoint == Other.RestorePoint;
667+
SavePoint == Other.SavePoint && RestorePoint == Other.RestorePoint &&
668+
IsCalleeSavedInfoValid == Other.IsCalleeSavedInfoValid;
667669
}
668670
};
669671

@@ -691,6 +693,8 @@ template <> struct MappingTraits<MachineFrameInfo> {
691693
YamlIO.mapOptional("hasMustTailInVarArgFunc", MFI.HasMustTailInVarArgFunc,
692694
false);
693695
YamlIO.mapOptional("hasTailCall", MFI.HasTailCall, false);
696+
YamlIO.mapOptional("isCalleeSavedInfoValid", MFI.IsCalleeSavedInfoValid,
697+
false);
694698
YamlIO.mapOptional("localFrameSize", MFI.LocalFrameSize, (unsigned)0);
695699
YamlIO.mapOptional("savePoint", MFI.SavePoint,
696700
StringValue()); // Don't print it out when it's empty.

‎llvm/lib/CodeGen/MIRParser/MIRParser.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -779,6 +779,7 @@ bool MIRParserImpl::initializeFrameInfo(PerFunctionMIParsingState &PFS,
779779
MFI.setHasVAStart(YamlMFI.HasVAStart);
780780
MFI.setHasMustTailInVarArgFunc(YamlMFI.HasMustTailInVarArgFunc);
781781
MFI.setHasTailCall(YamlMFI.HasTailCall);
782+
MFI.setCalleeSavedInfoValid(YamlMFI.IsCalleeSavedInfoValid);
782783
MFI.setLocalFrameSize(YamlMFI.LocalFrameSize);
783784
if (!YamlMFI.SavePoint.Value.empty()) {
784785
MachineBasicBlock *MBB = nullptr;

‎llvm/lib/CodeGen/MIRPrinter.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -368,6 +368,7 @@ void MIRPrinter::convert(ModuleSlotTracker &MST,
368368
YamlMFI.HasVAStart = MFI.hasVAStart();
369369
YamlMFI.HasMustTailInVarArgFunc = MFI.hasMustTailInVarArgFunc();
370370
YamlMFI.HasTailCall = MFI.hasTailCall();
371+
YamlMFI.IsCalleeSavedInfoValid = MFI.isCalleeSavedInfoValid();
371372
YamlMFI.LocalFrameSize = MFI.getLocalFrameSize();
372373
if (MFI.getSavePoint()) {
373374
raw_string_ostream StrOS(YamlMFI.SavePoint.Value);

‎llvm/test/CodeGen/MIR/Generic/calleesaveinfovalid.mir

Lines changed: 158 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,158 @@
1+
2+
# RUN: llc -run-pass=none -o - %s | FileCheck %s
3+
4+
--- |
5+
6+
; No stack, no callee-saved info -> no callee-saved info
7+
define i32 @no_stack_no_calleesavedinfo(i32 noundef %0) #0 {
8+
%2 = tail call i32 @f4(i32 noundef %0)
9+
ret i32 %2
10+
}
11+
12+
; No stack but callee-saved info -> still callee-saved info
13+
define i32 @no_stack_calleesavedinfo(i32 noundef %0) #0 {
14+
%2 = tail call i32 @f4(i32 noundef %0)
15+
ret i32 %2
16+
}
17+
18+
; Stack but no callee-saved info -> still callee-saved info
19+
define i32 @stack_no_calleesavedinfo(i32 noundef %0) #0 {
20+
%2 = call i32 @f4(i32 noundef %0)
21+
%3 = add i32 %0, %2
22+
ret i32 %3
23+
}
24+
25+
; Stack and callee-saved info -> still callee-saved info
26+
define i32 @stack_calleesavedinfo(i32 noundef %0) #0 {
27+
%2 = call i32 @f4(i32 noundef %0)
28+
%3 = add i32 %0, %2
29+
ret i32 %3
30+
}
31+
32+
declare i32 @f4(i32 noundef)
33+
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attributes #0 = { nounwind }
35+
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...
37+
---
38+
# CHECK-LABEL: name: no_stack_no_calleesavedinfo
39+
# CHECK: isCalleeSavedInfoValid: false
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name: no_stack_no_calleesavedinfo
41+
alignment: 4
42+
tracksRegLiveness: true
43+
tracksDebugUserValues: true
44+
liveins:
45+
- { reg: '$w0' }
46+
frameInfo:
47+
maxAlignment: 1
48+
maxCallFrameSize: 0
49+
hasTailCall: true
50+
isCalleeSavedInfoValid: false
51+
stack: []
52+
machineFunctionInfo:
53+
hasRedZone: false
54+
body: |
55+
bb.0 (%ir-block.1):
56+
liveins: $w0
57+
58+
TCRETURNdi @f4, 0, csr_darwin_aarch64_aapcs, implicit $sp, implicit $w0
59+
60+
...
61+
---
62+
# CHECK-LABEL: name: no_stack_calleesavedinfo
63+
# CHECK: isCalleeSavedInfoValid: true
64+
name: no_stack_calleesavedinfo
65+
alignment: 4
66+
tracksRegLiveness: true
67+
tracksDebugUserValues: true
68+
liveins:
69+
- { reg: '$w0' }
70+
frameInfo:
71+
maxAlignment: 1
72+
maxCallFrameSize: 0
73+
hasTailCall: true
74+
isCalleeSavedInfoValid: true
75+
stack: []
76+
machineFunctionInfo:
77+
hasRedZone: false
78+
body: |
79+
bb.0 (%ir-block.1):
80+
liveins: $w0
81+
82+
TCRETURNdi @f4, 0, csr_darwin_aarch64_aapcs, implicit $sp, implicit $w0
83+
84+
...
85+
---
86+
# CHECK-LABEL: name: stack_no_calleesavedinfo
87+
# CHECK: isCalleeSavedInfoValid: true
88+
name: stack_no_calleesavedinfo
89+
alignment: 4
90+
tracksRegLiveness: true
91+
tracksDebugUserValues: true
92+
liveins:
93+
- { reg: '$w0' }
94+
frameInfo:
95+
stackSize: 32
96+
maxAlignment: 8
97+
adjustsStack: true
98+
hasCalls: true
99+
maxCallFrameSize: 0
100+
isCalleeSavedInfoValid: false
101+
stack:
102+
- { id: 0, type: spill-slot, offset: -8, size: 8, alignment: 8, callee-saved-register: '$lr' }
103+
- { id: 1, type: spill-slot, offset: -16, size: 8, alignment: 8, callee-saved-register: '$fp' }
104+
- { id: 2, type: spill-slot, offset: -24, size: 8, alignment: 8, callee-saved-register: '$x19' }
105+
- { id: 3, type: spill-slot, offset: -32, size: 8, alignment: 8, callee-saved-register: '$x20' }
106+
machineFunctionInfo:
107+
hasRedZone: false
108+
body: |
109+
bb.0 (%ir-block.1):
110+
liveins: $w0, $x19, $x20, $lr
111+
112+
early-clobber $sp = frame-setup STPXpre killed $x20, killed $x19, $sp, -4 :: (store (s64) into %stack.3), (store (s64) into %stack.2)
113+
frame-setup STPXi killed $fp, killed $lr, $sp, 2 :: (store (s64) into %stack.1), (store (s64) into %stack.0)
114+
renamable $w19 = COPY $w0
115+
BL @f4, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
116+
$w0 = ADDWrr killed renamable $w19, killed renamable $w0
117+
$fp, $lr = frame-destroy LDPXi $sp, 2 :: (load (s64) from %stack.1), (load (s64) from %stack.0)
118+
early-clobber $sp, $x20, $x19 = frame-destroy LDPXpost $sp, 4 :: (load (s64) from %stack.3), (load (s64) from %stack.2)
119+
RET_ReallyLR implicit $w0
120+
121+
...
122+
---
123+
# CHECK-LABEL: name: stack_calleesavedinfo
124+
# CHECK: isCalleeSavedInfoValid: true
125+
name: stack_calleesavedinfo
126+
alignment: 4
127+
tracksRegLiveness: true
128+
tracksDebugUserValues: true
129+
liveins:
130+
- { reg: '$w0' }
131+
frameInfo:
132+
stackSize: 32
133+
maxAlignment: 8
134+
adjustsStack: true
135+
hasCalls: true
136+
maxCallFrameSize: 0
137+
isCalleeSavedInfoValid: true
138+
stack:
139+
- { id: 0, type: spill-slot, offset: -8, size: 8, alignment: 8, callee-saved-register: '$lr' }
140+
- { id: 1, type: spill-slot, offset: -16, size: 8, alignment: 8, callee-saved-register: '$fp' }
141+
- { id: 2, type: spill-slot, offset: -24, size: 8, alignment: 8, callee-saved-register: '$x19' }
142+
- { id: 3, type: spill-slot, offset: -32, size: 8, alignment: 8, callee-saved-register: '$x20' }
143+
machineFunctionInfo:
144+
hasRedZone: false
145+
body: |
146+
bb.0 (%ir-block.1):
147+
liveins: $w0, $x19, $x20, $lr
148+
149+
early-clobber $sp = frame-setup STPXpre killed $x20, killed $x19, $sp, -4 :: (store (s64) into %stack.3), (store (s64) into %stack.2)
150+
frame-setup STPXi killed $fp, killed $lr, $sp, 2 :: (store (s64) into %stack.1), (store (s64) into %stack.0)
151+
renamable $w19 = COPY $w0
152+
BL @f4, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
153+
$w0 = ADDWrr killed renamable $w19, killed renamable $w0
154+
$fp, $lr = frame-destroy LDPXi $sp, 2 :: (load (s64) from %stack.1), (load (s64) from %stack.0)
155+
early-clobber $sp, $x20, $x19 = frame-destroy LDPXpost $sp, 4 :: (load (s64) from %stack.3), (load (s64) from %stack.2)
156+
RET_ReallyLR implicit $w0
157+
158+
...

‎llvm/test/CodeGen/MIR/Generic/frame-info.mir

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -44,6 +44,7 @@ tracksRegLiveness: true
4444
# CHECK-NEXT: hasVAStart: false
4545
# CHECK-NEXT: hasMustTailInVarArgFunc: false
4646
# CHECK-NEXT: hasTailCall: false
47+
# CHECK-NEXT: isCalleeSavedInfoValid: false
4748
# CHECK-NEXT: localFrameSize: 0
4849
# CHECK-NEXT: savePoint: ''
4950
# CHECK-NEXT: restorePoint: ''

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