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Revert "[IR] Avoid self-referencing values caused by PHI node removal"
This reverts commit b1b2f0a.
1 parent 13e3598 commit 9fe2146

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2 files changed

+2
-68
lines changed

2 files changed

+2
-68
lines changed

llvm/lib/IR/BasicBlock.cpp

Lines changed: 2 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -556,14 +556,8 @@ void BasicBlock::removePredecessor(BasicBlock *Pred,
556556
if (NumPreds == 1)
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continue;
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559-
// Try to replace the PHI node with a constant value, but make sure that
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// this value isn't using the PHI node. (Except it's a PHI node itself. PHI
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// nodes are allowed to reference themselves.)
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if (Value *PhiConstant = Phi.hasConstantValue();
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PhiConstant &&
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(!isa<Instruction>(PhiConstant) || isa<PHINode>(PhiConstant) ||
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llvm::all_of(Phi.users(),
566-
[PhiConstant](User *U) { return U != PhiConstant; }))) {
559+
// Try to replace the PHI node with a constant value.
560+
if (Value *PhiConstant = Phi.hasConstantValue()) {
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Phi.replaceAllUsesWith(PhiConstant);
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Phi.eraseFromParent();
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}

llvm/test/Transforms/JumpThreading/unreachable-loops.ll

Lines changed: 0 additions & 60 deletions
Original file line numberDiff line numberDiff line change
@@ -180,64 +180,4 @@ cleanup2343.loopexit4: ; preds = %cleanup1491
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unreachable
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}
182182

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; This segfaults due to recursion in %C4. Reason: %L6 is identified to be a
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; "partially redundant load" and is replaced by a PHI node. The PHI node is then
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; simplified to be constant and is removed. This leads to %L6 being replaced by
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; %C4, which makes %C4 invalid since it uses %L6.
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; The test case has been generated by the AMD Fuzzing project and simplified
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; manually and by llvm-reduce.
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define i32 @constant_phi_leads_to_self_reference() {
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; CHECK-LABEL: @constant_phi_leads_to_self_reference(
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; CHECK-NEXT: [[A9:%.*]] = alloca i1, align 1
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; CHECK-NEXT: br label [[F6:%.*]]
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; CHECK: T3:
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; CHECK-NEXT: [[L6:%.*]] = phi i1 [ [[C4:%.*]], [[BB6:%.*]] ]
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; CHECK-NEXT: br label [[BB5:%.*]]
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; CHECK: BB5:
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; CHECK-NEXT: [[L10:%.*]] = load i1, ptr [[A9]], align 1
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; CHECK-NEXT: br i1 [[L10]], label [[BB6]], label [[F6]]
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; CHECK: BB6:
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; CHECK-NEXT: [[LGV3:%.*]] = load i1, ptr null, align 1
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; CHECK-NEXT: [[C4]] = icmp sle i1 [[L6]], true
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; CHECK-NEXT: store i1 [[C4]], ptr null, align 1
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; CHECK-NEXT: br i1 [[L6]], label [[F6]], label [[T3:%.*]]
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; CHECK: F6:
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; CHECK-NEXT: ret i32 0
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; CHECK: F7:
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; CHECK-NEXT: br label [[BB5]]
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;
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%A9 = alloca i1, align 1
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br i1 false, label %BB4, label %F6
212-
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BB4: ; preds = %0
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br i1 false, label %F6, label %F1
215-
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F1: ; preds = %BB4
217-
br i1 false, label %T4, label %T3
218-
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T3: ; preds = %T4, %BB6, %F1
220-
%L6 = load i1, ptr null, align 1
221-
br label %BB5
222-
223-
BB5: ; preds = %F7, %T3
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%L10 = load i1, ptr %A9, align 1
225-
br i1 %L10, label %BB6, label %F6
226-
227-
BB6: ; preds = %BB5
228-
%LGV3 = load i1, ptr null, align 1
229-
%C4 = icmp sle i1 %L6, true
230-
store i1 %C4, ptr null, align 1
231-
br i1 %L6, label %F6, label %T3
232-
233-
T4: ; preds = %F1
234-
br label %T3
235-
236-
F6: ; preds = %BB6, %BB5, %BB4, %0
237-
ret i32 0
238-
239-
F7: ; No predecessors!
240-
br label %BB5
241-
}
242-
243183
!0 = !{!"branch_weights", i32 2146410443, i32 1073205}

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