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1 parent 6735d52 commit 9fecb4fCopy full SHA for 9fecb4f
llvm/lib/CodeGen/MachineSink.cpp
@@ -1664,8 +1664,7 @@ bool MachineSinking::aggressivelySinkIntoCycle(
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return false;
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LLVM_DEBUG(dbgs() << "AggressiveCycleSink: Finding sink block for: " << I);
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- MachineBasicBlock *Preheader = Cycle->getCyclePreheader();
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- assert(Preheader && "Cycle sink needs a preheader block");
+ assert(Cycle->getCyclePreheader() && "Cycle sink needs a preheader block");
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SmallVector<std::pair<RegSubRegPair, MachineInstr *>> Uses;
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MachineOperand &DefMO = I.getOperand(0);
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