Skip to content

Commit a160536

Browse files
Pierre-vhPierre-vh
authored
[TableGen][GlobalISel] Add specialized opcodes (#74823)
Most users of AddImm and CheckConstantInt only use 1 byte immediates, so I added an opcode variants for those. That way all those instructions save 7 bytes. Also added an opcode for AddTempRegister for the cases where there are no register flags. Space savings: - AMDGPUGenGlobalISel: 470180 bytes to 422564 (-10%) - AArch64GenGlobalISel.inc: 383893 bytes to 374046
1 parent 538a83e commit a160536

19 files changed

+260
-216
lines changed

‎llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -242,6 +242,13 @@ enum {
242242
/// - OpIdx(ULEB128) - Operand index
243243
/// - Val(8) Expected integer
244244
GIM_CheckConstantInt,
245+
246+
/// Check the operand is a specific 8-bit signed integer
247+
/// - InsnID(ULEB128) - Instruction ID
248+
/// - OpIdx(ULEB128) - Operand index
249+
/// - Val(1) Expected integer
250+
GIM_CheckConstantInt8,
251+
245252
/// Check the operand is a specific literal integer (i.e. MO.isImm() or
246253
/// MO.isCImm() is true).
247254
/// - InsnID(ULEB128) - Instruction ID
@@ -399,6 +406,12 @@ enum {
399406
/// - TempRegFlags(2) - The register flags to set
400407
GIR_AddTempRegister,
401408

409+
/// Add a temporary register to the specified instruction without
410+
/// setting any flags.
411+
/// - InsnID(ULEB128) - Instruction ID to modify
412+
/// - TempRegID(ULEB128) - The temporary register ID to add
413+
GIR_AddSimpleTempRegister,
414+
402415
/// Add a temporary register to the specified instruction
403416
/// - InsnID(ULEB128) - Instruction ID to modify
404417
/// - TempRegID(ULEB128) - The temporary register ID to add
@@ -411,6 +424,11 @@ enum {
411424
/// - Imm(8) - The immediate to add
412425
GIR_AddImm,
413426

427+
/// Add signed 8 bit immediate to the specified instruction
428+
/// - InsnID(ULEB128) - Instruction ID to modify
429+
/// - Imm(1) - The immediate to add
430+
GIR_AddImm8,
431+
414432
/// Add an CImm to the specified instruction
415433
/// - InsnID(ULEB128) - Instruction ID to modify
416434
/// - Ty(1) - Type of the constant immediate.

‎llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h

Lines changed: 12 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -784,10 +784,13 @@ bool GIMatchTableExecutor::executeMatchTable(
784784
break;
785785
}
786786

787-
case GIM_CheckConstantInt: {
787+
case GIM_CheckConstantInt:
788+
case GIM_CheckConstantInt8: {
789+
const bool IsInt8 = (MatcherOpcode == GIM_CheckConstantInt8);
790+
788791
uint64_t InsnID = readULEB();
789792
uint64_t OpIdx = readULEB();
790-
uint64_t Value = readU64();
793+
uint64_t Value = IsInt8 ? (int64_t)readS8() : readU64();
791794
DEBUG_WITH_TYPE(TgtExecutor::getName(),
792795
dbgs() << CurrentIdx << ": GIM_CheckConstantInt(MIs["
793796
<< InsnID << "]->getOperand(" << OpIdx
@@ -1157,11 +1160,14 @@ bool GIMatchTableExecutor::executeMatchTable(
11571160
MI->setFlags(MI->getFlags() | State.MIs[OldInsnID]->getFlags());
11581161
break;
11591162
}
1163+
case GIR_AddSimpleTempRegister:
11601164
case GIR_AddTempRegister:
11611165
case GIR_AddTempSubRegister: {
11621166
uint64_t InsnID = readULEB();
11631167
uint64_t TempRegID = readULEB();
1164-
uint16_t TempRegFlags = readU16();
1168+
uint16_t TempRegFlags = 0;
1169+
if (MatcherOpcode != GIR_AddSimpleTempRegister)
1170+
TempRegFlags = readU16();
11651171
uint16_t SubReg = 0;
11661172
if (MatcherOpcode == GIR_AddTempSubRegister)
11671173
SubReg = readU16();
@@ -1179,9 +1185,11 @@ bool GIMatchTableExecutor::executeMatchTable(
11791185
break;
11801186
}
11811187

1188+
case GIR_AddImm8:
11821189
case GIR_AddImm: {
1190+
const bool IsAdd8 = (MatcherOpcode == GIR_AddImm8);
11831191
uint64_t InsnID = readULEB();
1184-
uint64_t Imm = readU64();
1192+
uint64_t Imm = IsAdd8 ? (int64_t)readS8() : readU64();
11851193
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
11861194
OutMIs[InsnID].addImm(Imm);
11871195
DEBUG_WITH_TYPE(TgtExecutor::getName(),

‎llvm/test/TableGen/DefaultOpsGlobalISel.td

Lines changed: 27 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,7 @@ def clamp : OperandWithDefaultOps <i1, (ops (i1 0))>;
3333

3434
// CHECK: const uint8_t *MyTargetInstructionSelector::getMatchTable() const {
3535
// CHECK-NEXT: constexpr static uint8_t MatchTable0[] = {
36-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 0*/ GIMT_Encode4(86), // Rule ID 3 //
36+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 0*/ GIMT_Encode4(79), // Rule ID 3 //
3737
// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
3838
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_FMAXNUM),
3939
// CHECK-NEXT: // MIs[0] DstI[dst]
@@ -52,13 +52,13 @@ def clamp : OperandWithDefaultOps <i1, (ops (i1 0))>;
5252
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // src0
5353
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(1), /*SubOperand*/1, // mods1
5454
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(1), /*SubOperand*/0, // src1
55-
// CHECK-NEXT: GIR_AddImm, /*InsnID*/0, /*Imm*/GIMT_Encode8(0),
55+
// CHECK-NEXT: GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
5656
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
5757
// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5858
// CHECK-NEXT: // GIR_Coverage, 3,
5959
// CHECK-NEXT: GIR_Done,
60-
// CHECK-NEXT: // Label 0: @86
61-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 1*/ GIMT_Encode4(146), // Rule ID 2 //
60+
// CHECK-NEXT: // Label 0: @79
61+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 1*/ GIMT_Encode4(139), // Rule ID 2 //
6262
// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
6363
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_FFLOOR),
6464
// CHECK-NEXT: // MIs[0] DstI[dst]
@@ -77,8 +77,8 @@ def clamp : OperandWithDefaultOps <i1, (ops (i1 0))>;
7777
// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7878
// CHECK-NEXT: // GIR_Coverage, 2,
7979
// CHECK-NEXT: GIR_Done,
80-
// CHECK-NEXT: // Label 1: @146
81-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 2*/ GIMT_Encode4(221), // Rule ID 8 //
80+
// CHECK-NEXT: // Label 1: @139
81+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 2*/ GIMT_Encode4(207), // Rule ID 8 //
8282
// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
8383
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_FCANONICALIZE),
8484
// CHECK-NEXT: // MIs[0] DstI[dst]
@@ -94,13 +94,13 @@ def clamp : OperandWithDefaultOps <i1, (ops (i1 0))>;
9494
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // src
9595
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // mods
9696
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // src
97-
// CHECK-NEXT: GIR_AddImm, /*InsnID*/0, /*Imm*/GIMT_Encode8(0),
97+
// CHECK-NEXT: GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9898
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
9999
// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
100100
// CHECK-NEXT: // GIR_Coverage, 8,
101101
// CHECK-NEXT: GIR_Done,
102-
// CHECK-NEXT: // Label 2: @221
103-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 3*/ GIMT_Encode4(286), // Rule ID 5 //
102+
// CHECK-NEXT: // Label 2: @207
103+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 3*/ GIMT_Encode4(265), // Rule ID 5 //
104104
// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
105105
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_FCOS),
106106
// CHECK-NEXT: // MIs[0] DstI[dst]
@@ -114,13 +114,13 @@ def clamp : OperandWithDefaultOps <i1, (ops (i1 0))>;
114114
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // DstI[dst]
115115
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // src0
116116
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // omod
117-
// CHECK-NEXT: GIR_AddImm, /*InsnID*/0, /*Imm*/GIMT_Encode8(0),
117+
// CHECK-NEXT: GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
118118
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
119119
// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
120120
// CHECK-NEXT: // GIR_Coverage, 5,
121121
// CHECK-NEXT: GIR_Done,
122-
// CHECK-NEXT: // Label 3: @286
123-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 4*/ GIMT_Encode4(375), // Rule ID 7 //
122+
// CHECK-NEXT: // Label 3: @265
123+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 4*/ GIMT_Encode4(345), // Rule ID 7 //
124124
// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
125125
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_FEXP2),
126126
// CHECK-NEXT: // MIs[0] DstI[dst]
@@ -134,19 +134,19 @@ def clamp : OperandWithDefaultOps <i1, (ops (i1 0))>;
134134
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(MyTarget::FFOO),
135135
// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
136136
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/1, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // src0
137-
// CHECK-NEXT: GIR_AddImm, /*InsnID*/1, /*Imm*/GIMT_Encode8(0),
137+
// CHECK-NEXT: GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
138138
// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
139139
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(MyTarget::FEEPLE),
140140
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // DstI[dst]
141141
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // src0
142-
// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0),
142+
// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
143143
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // clamp
144144
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
145145
// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
146146
// CHECK-NEXT: // GIR_Coverage, 7,
147147
// CHECK-NEXT: GIR_Done,
148-
// CHECK-NEXT: // Label 4: @375
149-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 5*/ GIMT_Encode4(430), // Rule ID 0 //
148+
// CHECK-NEXT: // Label 4: @345
149+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 5*/ GIMT_Encode4(400), // Rule ID 0 //
150150
// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
151151
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_FSIN),
152152
// CHECK-NEXT: // MIs[0] DstI[dst]
@@ -164,8 +164,8 @@ def clamp : OperandWithDefaultOps <i1, (ops (i1 0))>;
164164
// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
165165
// CHECK-NEXT: // GIR_Coverage, 0,
166166
// CHECK-NEXT: GIR_Done,
167-
// CHECK-NEXT: // Label 5: @430
168-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 6*/ GIMT_Encode4(495), // Rule ID 6 //
167+
// CHECK-NEXT: // Label 5: @400
168+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 6*/ GIMT_Encode4(458), // Rule ID 6 //
169169
// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
170170
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_FSQRT),
171171
// CHECK-NEXT: // MIs[0] DstI[dst]
@@ -178,14 +178,14 @@ def clamp : OperandWithDefaultOps <i1, (ops (i1 0))>;
178178
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(MyTarget::FLAMP),
179179
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // DstI[dst]
180180
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // src0
181-
// CHECK-NEXT: GIR_AddImm, /*InsnID*/0, /*Imm*/GIMT_Encode8(93),
181+
// CHECK-NEXT: GIR_AddImm8, /*InsnID*/0, /*Imm*/93,
182182
// CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // clamp
183183
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
184184
// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
185185
// CHECK-NEXT: // GIR_Coverage, 6,
186186
// CHECK-NEXT: GIR_Done,
187-
// CHECK-NEXT: // Label 6: @495
188-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 7*/ GIMT_Encode4(547), // Rule ID 1 //
187+
// CHECK-NEXT: // Label 6: @458
188+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 7*/ GIMT_Encode4(503), // Rule ID 1 //
189189
// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
190190
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_INTRINSIC_ROUND),
191191
// CHECK-NEXT: // MIs[0] DstI[dst]
@@ -197,13 +197,13 @@ def clamp : OperandWithDefaultOps <i1, (ops (i1 0))>;
197197
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(MyTarget::FBAR),
198198
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // DstI[dst]
199199
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src0
200-
// CHECK-NEXT: GIR_AddImm, /*InsnID*/0, /*Imm*/GIMT_Encode8(0),
200+
// CHECK-NEXT: GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
201201
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
202202
// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
203203
// CHECK-NEXT: // GIR_Coverage, 1,
204204
// CHECK-NEXT: GIR_Done,
205-
// CHECK-NEXT: // Label 7: @547
206-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 8*/ GIMT_Encode4(599), // Rule ID 4 //
205+
// CHECK-NEXT: // Label 7: @503
206+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 8*/ GIMT_Encode4(548), // Rule ID 4 //
207207
// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
208208
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_INTRINSIC_TRUNC),
209209
// CHECK-NEXT: // MIs[0] DstI[dst]
@@ -215,14 +215,14 @@ def clamp : OperandWithDefaultOps <i1, (ops (i1 0))>;
215215
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(MyTarget::FFOO),
216216
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // DstI[dst]
217217
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src0
218-
// CHECK-NEXT: GIR_AddImm, /*InsnID*/0, /*Imm*/GIMT_Encode8(0),
218+
// CHECK-NEXT: GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
219219
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
220220
// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
221221
// CHECK-NEXT: // GIR_Coverage, 4,
222222
// CHECK-NEXT: GIR_Done,
223-
// CHECK-NEXT: // Label 8: @599
223+
// CHECK-NEXT: // Label 8: @548
224224
// CHECK-NEXT: GIM_Reject,
225-
// CHECK-NEXT: };
225+
// CHECK-NEXT: }; // Size: 549 bytes
226226
// CHECK-NEXT: return MatchTable0;
227227
// CHECK-NEXT: }
228228

‎llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-replacerreg.td

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -28,11 +28,11 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
2828

2929
// CHECK: const uint8_t *GenMyCombiner::getMatchTable() const {
3030
// CHECK-NEXT: constexpr static uint8_t MatchTable0[] = {
31-
// CHECK-NEXT: GIM_SwitchOpcode, /*MI*/0, /*[*/GIMT_Encode2(65), GIMT_Encode2(181), /*)*//*default:*//*Label 2*/ GIMT_Encode4(558),
31+
// CHECK-NEXT: GIM_SwitchOpcode, /*MI*/0, /*[*/GIMT_Encode2(65), GIMT_Encode2(181), /*)*//*default:*//*Label 2*/ GIMT_Encode4(556),
3232
// CHECK-NEXT: /*TargetOpcode::G_UNMERGE_VALUES*//*Label 0*/ GIMT_Encode4(474), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
33-
// CHECK-NEXT: /*TargetOpcode::G_FNEG*//*Label 1*/ GIMT_Encode4(526),
33+
// CHECK-NEXT: /*TargetOpcode::G_FNEG*//*Label 1*/ GIMT_Encode4(524),
3434
// CHECK-NEXT: // Label 0: @474
35-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 3*/ GIMT_Encode4(525), // Rule ID 1 //
35+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 3*/ GIMT_Encode4(523), // Rule ID 1 //
3636
// CHECK-NEXT: GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule1Enabled),
3737
// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
3838
// CHECK-NEXT: // MIs[0] a
@@ -52,15 +52,15 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
5252
// CHECK-NEXT: // Combiner Rule #1: ReplaceTemp
5353
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::G_UNMERGE_VALUES),
5454
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // a
55-
// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(0),
55+
// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
5656
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // y
5757
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
5858
// CHECK-NEXT: GIR_ReplaceRegWithTempReg, /*OldInsnID*/0, /*OldOpIdx*/1, /*TempRegID*/0,
5959
// CHECK-NEXT: GIR_Done,
60-
// CHECK-NEXT: // Label 3: @525
60+
// CHECK-NEXT: // Label 3: @523
6161
// CHECK-NEXT: GIM_Reject,
62-
// CHECK-NEXT: // Label 1: @526
63-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 4*/ GIMT_Encode4(557), // Rule ID 0 //
62+
// CHECK-NEXT: // Label 1: @524
63+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 4*/ GIMT_Encode4(555), // Rule ID 0 //
6464
// CHECK-NEXT: GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule0Enabled),
6565
// CHECK-NEXT: // MIs[0] dst
6666
// CHECK-NEXT: // No operand predicates
@@ -75,10 +75,10 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
7575
// CHECK-NEXT: GIR_ReplaceReg, /*OldInsnID*/0, /*OldOpIdx*/0, /*NewInsnId*/1, /*NewOpIdx*/1,
7676
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
7777
// CHECK-NEXT: GIR_Done,
78-
// CHECK-NEXT: // Label 4: @557
78+
// CHECK-NEXT: // Label 4: @555
7979
// CHECK-NEXT: GIM_Reject,
80-
// CHECK-NEXT: // Label 2: @558
80+
// CHECK-NEXT: // Label 2: @556
8181
// CHECK-NEXT: GIM_Reject,
82-
// CHECK-NEXT: }; // Size: 559 bytes
82+
// CHECK-NEXT: }; // Size: 557 bytes
8383
// CHECK-NEXT: return MatchTable0;
8484
// CHECK-NEXT: }

0 commit comments

Comments
 (0)