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[X86][NFC] Remove redundant constraints in X86InstrArithmetic.td after #76319
1 parent 3c92011 commit a1f1371

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+11
-17
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1 file changed

+11
-17
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llvm/lib/Target/X86/X86InstrArithmetic.td

Lines changed: 11 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -134,14 +134,12 @@ let Form = MRMSrcMem;
134134
let SchedRW = [sched.Folded, sched.ReadAfterFold];
135135
}
136136

137-
let Constraints = "$src1 = $dst" in {
138137
def IMUL16rr : IMulOpRR<Xi16, WriteIMul16Reg>, OpSize16;
139138
def IMUL32rr : IMulOpRR<Xi32, WriteIMul32Reg>, OpSize32;
140139
def IMUL64rr : IMulOpRR<Xi64, WriteIMul64Reg>;
141140
def IMUL16rm : IMulOpRM<Xi16, WriteIMul16Reg>, OpSize16;
142141
def IMUL32rm : IMulOpRM<Xi32, WriteIMul32Reg>, OpSize32;
143142
def IMUL64rm : IMulOpRM<Xi64, WriteIMul64Reg>;
144-
}
145143

146144
class IMulOpRI8_R<X86TypeInfo t, X86FoldableSchedWrite sched>
147145
: BinOpRI8<0x6B, "imul", binop_ndd_args, t, MRMSrcReg,
@@ -547,7 +545,6 @@ multiclass ArithBinOp_RF<bits<8> BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4,
547545
// These are for the disassembler since 0x82 opcode behaves like 0x80, but
548546
// not in 64-bit mode.
549547
let Predicates = [Not64BitMode] in {
550-
let Constraints = "$src1 = $dst" in
551548
def NAME#8ri8 : BinOpRI8_RF<0x82, mnemonic, Xi8, RegMRM>, DisassembleOnly;
552549
def NAME#8mi8 : BinOpMI8_MF<mnemonic, Xi8, MemMRM>, DisassembleOnly;
553550
}
@@ -719,7 +716,6 @@ multiclass ArithBinOp_RFF<bits<8> BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4,
719716
// These are for the disassembler since 0x82 opcode behaves like 0x80, but
720717
// not in 64-bit mode.
721718
let Predicates = [Not64BitMode] in {
722-
let Constraints = "$src1 = $dst" in
723719
def NAME#8ri8 : BinOpRI8F_RF<0x82, mnemonic, Xi8, RegMRM>, DisassembleOnly;
724720
def NAME#8mi8 : BinOpMI8F_MF<mnemonic, Xi8, MemMRM>, DisassembleOnly;
725721
}
@@ -1122,17 +1118,15 @@ defm MULX64 : MulX<Xi64, WriteMULX64>, REX_W;
11221118
//
11231119
// We don't have patterns for these as there is no advantage over ADC for
11241120
// most code.
1125-
let Constraints = "$src1 = $dst" in {
1126-
let Form = MRMSrcReg in {
1127-
def ADCX32rr : BinOpRRF_RF<0xF6, "adcx", Xi32, null_frag>, T8, PD;
1128-
def ADCX64rr : BinOpRRF_RF<0xF6, "adcx", Xi64, null_frag>, T8, PD;
1129-
def ADOX32rr : BinOpRRF_RF<0xF6, "adox", Xi32, null_frag>, T8, XS;
1130-
def ADOX64rr : BinOpRRF_RF<0xF6, "adox", Xi64, null_frag>, T8, XS;
1131-
}
1132-
let Form = MRMSrcMem in {
1133-
def ADCX32rm : BinOpRMF_RF<0xF6, "adcx", Xi32, null_frag>, T8, PD;
1134-
def ADCX64rm : BinOpRMF_RF<0xF6, "adcx", Xi64, null_frag>, T8, PD;
1135-
def ADOX32rm : BinOpRMF_RF<0xF6, "adox", Xi32, null_frag>, T8, XS;
1136-
def ADOX64rm : BinOpRMF_RF<0xF6, "adox", Xi64, null_frag>, T8, XS;
1137-
}
1121+
let Form = MRMSrcReg in {
1122+
def ADCX32rr : BinOpRRF_RF<0xF6, "adcx", Xi32, null_frag>, T8, PD;
1123+
def ADCX64rr : BinOpRRF_RF<0xF6, "adcx", Xi64, null_frag>, T8, PD;
1124+
def ADOX32rr : BinOpRRF_RF<0xF6, "adox", Xi32, null_frag>, T8, XS;
1125+
def ADOX64rr : BinOpRRF_RF<0xF6, "adox", Xi64, null_frag>, T8, XS;
1126+
}
1127+
let Form = MRMSrcMem in {
1128+
def ADCX32rm : BinOpRMF_RF<0xF6, "adcx", Xi32, null_frag>, T8, PD;
1129+
def ADCX64rm : BinOpRMF_RF<0xF6, "adcx", Xi64, null_frag>, T8, PD;
1130+
def ADOX32rm : BinOpRMF_RF<0xF6, "adox", Xi32, null_frag>, T8, XS;
1131+
def ADOX64rm : BinOpRMF_RF<0xF6, "adox", Xi64, null_frag>, T8, XS;
11381132
}

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