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[RISCV,test] Replace -riscv-no-aliases with -M no-aliases
now that llc supports `-M no-aliases` (along with llvm-mc and llvm-objdump) (#121078). Pull Request: #134879
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-39
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‎llvm/test/CodeGen/RISCV/add-before-shl.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs --riscv-no-aliases < %s \
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs -M no-aliases < %s \
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; RUN: | FileCheck -check-prefixes=RV32I %s
4-
; RUN: llc -mtriple=riscv64 -verify-machineinstrs --riscv-no-aliases < %s \
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; RUN: llc -mtriple=riscv64 -verify-machineinstrs -M no-aliases < %s \
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; RUN: | FileCheck -check-prefixes=RV64I %s
6-
; RUN: llc -mtriple=riscv32 -mattr=+c -verify-machineinstrs --riscv-no-aliases \
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; RUN: llc -mtriple=riscv32 -mattr=+c -verify-machineinstrs -M no-aliases \
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; RUN: < %s | FileCheck -check-prefixes=RV32C %s
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; RUN: llc -mtriple=riscv64 -mattr=+c -verify-machineinstrs --riscv-no-aliases \
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; RUN: llc -mtriple=riscv64 -mattr=+c -verify-machineinstrs -M no-aliases \
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; RUN: < %s | FileCheck -check-prefixes=RV64C %s
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; RUN: llc -mtriple=riscv32 -mattr=+zca -verify-machineinstrs --riscv-no-aliases \
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; RUN: llc -mtriple=riscv32 -mattr=+zca -verify-machineinstrs -M no-aliases \
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; RUN: < %s | FileCheck -check-prefixes=RV32C %s
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; RUN: llc -mtriple=riscv64 -mattr=+zca -verify-machineinstrs --riscv-no-aliases \
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; RUN: llc -mtriple=riscv64 -mattr=+zca -verify-machineinstrs -M no-aliases \
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; RUN: < %s | FileCheck -check-prefixes=RV64C %s
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; These test that constant adds are not moved after shifts by DAGCombine,

‎llvm/test/CodeGen/RISCV/kcfi.ll

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; RUN: llc -mtriple=riscv32 -verify-machineinstrs -riscv-no-aliases < %s \
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs -M no-aliases < %s \
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; RUN: | FileCheck %s --check-prefixes=CHECK,RV32
3-
; RUN: llc -mtriple=riscv64 -verify-machineinstrs -riscv-no-aliases < %s \
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; RUN: llc -mtriple=riscv64 -verify-machineinstrs -M no-aliases < %s \
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; RUN: | FileCheck %s --check-prefixes=CHECK,RV64
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; CHECK: .word 12345678

‎llvm/test/CodeGen/RISCV/patchable-function-entry.ll

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;; Test the function attribute "patchable-function-entry".
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; RUN: llc -mtriple=riscv32 --riscv-no-aliases < %s | FileCheck %s --check-prefixes=CHECK,RV32,NORVC
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; RUN: llc -mtriple=riscv64 --riscv-no-aliases < %s | FileCheck %s --check-prefixes=CHECK,RV64,NORVC
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; RUN: llc -mtriple=riscv32 -mattr=+c --riscv-no-aliases < %s | FileCheck %s --check-prefixes=CHECK,RV32,RVC
5-
; RUN: llc -mtriple=riscv64 -mattr=+c --riscv-no-aliases < %s | FileCheck %s --check-prefixes=CHECK,RV64,RVC
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; RUN: llc -mtriple=riscv32 -M no-aliases < %s | FileCheck %s --check-prefixes=CHECK,RV32,NORVC
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; RUN: llc -mtriple=riscv64 -M no-aliases < %s | FileCheck %s --check-prefixes=CHECK,RV64,NORVC
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; RUN: llc -mtriple=riscv32 -mattr=+c -M no-aliases < %s | FileCheck %s --check-prefixes=CHECK,RV32,RVC
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; RUN: llc -mtriple=riscv64 -mattr=+c -M no-aliases < %s | FileCheck %s --check-prefixes=CHECK,RV64,RVC
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define void @f0() "patchable-function-entry"="0" {
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; CHECK-LABEL: f0:

‎llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-array.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs --riscv-no-aliases < %s | FileCheck %s
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; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs -M no-aliases < %s | FileCheck %s
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target triple = "riscv64-unknown-unknown-elf"
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‎llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-struct.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -mtriple=riscv64 -mattr=+m,+d,+v -verify-machineinstrs \
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; RUN: --riscv-no-aliases < %s | FileCheck %s
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; RUN: -M no-aliases < %s | FileCheck %s
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target triple = "riscv64-unknown-unknown-elf"
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‎llvm/test/CodeGen/RISCV/rvv/alloca-load-store-vector-tuple.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=riscv64 -mattr=+m,+d,+v -verify-machineinstrs \
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; RUN: --riscv-no-aliases < %s | FileCheck %s
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; RUN: -M no-aliases < %s | FileCheck %s
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target triple = "riscv64-unknown-unknown-elf"
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‎llvm/test/MC/RISCV/rv32p-valid.s

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# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-p -riscv-no-aliases -show-encoding \
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-p -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
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# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-p < %s \
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# RUN: | llvm-objdump --mattr=+experimental-p -M no-aliases -d -r - \

‎llvm/test/MC/RISCV/rv64p-valid.s

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# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-p -riscv-no-aliases -show-encoding \
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# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-p -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-p < %s \
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# RUN: | llvm-objdump --mattr=+experimental-p -M no-aliases -d -r - \

‎llvm/test/MC/RISCV/xqciac-valid.s

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# Xqciac - Qualcomm uC Load-Store Address Calculation Extension
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqciac -riscv-no-aliases -show-encoding \
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqciac -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ENC,CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-xqciac < %s \
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# RUN: | llvm-objdump --mattr=+experimental-xqciac -M no-aliases --no-print-imm-hex -d - \

‎llvm/test/MC/RISCV/xqcibi-valid.s

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# Xqcibi - Qualcomm uC Branch Immediate Extension
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcibi -riscv-no-aliases -show-encoding \
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcibi -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ENC,CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-xqcibi < %s \
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# RUN: | llvm-objdump --mattr=+experimental-xqcibi -M no-aliases -d - \

‎llvm/test/MC/RISCV/xqcibm-valid.s

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# Xqcibm - Qualcomm uC Bit Manipulation Extension
2-
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcibm -riscv-no-aliases -show-encoding \
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcibm -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ENC,CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-xqcibm < %s \
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# RUN: | llvm-objdump --mattr=+experimental-xqcibm -M no-aliases --no-print-imm-hex -d - \

‎llvm/test/MC/RISCV/xqcicli-valid.s

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# Xqcicli - Qualcomm uC Conditional Load Immediate Extension
2-
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcicli -riscv-no-aliases -show-encoding \
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcicli -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ENC,CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-xqcicli < %s \
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# RUN: | llvm-objdump --mattr=+experimental-xqcicli -M no-aliases --no-print-imm-hex -d - \

‎llvm/test/MC/RISCV/xqcicm-valid.s

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# Xqcicm - Qualcomm uC Conditional Move Extension
2-
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcicm -riscv-no-aliases -show-encoding \
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcicm -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ENC,CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-xqcicm < %s \
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# RUN: | llvm-objdump --mattr=+experimental-xqcicm -M no-aliases --no-print-imm-hex -d - \

‎llvm/test/MC/RISCV/xqciint-csrs-valid.s

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# Xqciint - Qualcomm uC Custom CSRs
2-
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqciint -riscv-no-aliases -show-encoding \
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqciint -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ENC %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-xqciint < %s \
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# RUN: | llvm-objdump --mattr=+experimental-xqciint -M no-aliases -d - \

‎llvm/test/MC/RISCV/xqciint-valid.s

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# Xqciint - Qualcomm uC Interrupts extension
2-
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqciint -riscv-no-aliases -show-encoding \
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqciint -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ENC,CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-xqciint < %s \
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# RUN: | llvm-objdump --mattr=+experimental-xqciint -M no-aliases --no-print-imm-hex -d - \

‎llvm/test/MC/RISCV/xqciio-aliases-valid.s

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# Xqciio - Qualcomm uC External Input Output extension
2-
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqciio -riscv-no-aliases -show-encoding \
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqciio -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ENC,CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-xqciio < %s \
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# RUN: | llvm-objdump --mattr=+experimental-xqciio -M no-aliases --no-print-imm-hex -d - \

‎llvm/test/MC/RISCV/xqciio-valid.s

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# Xqciio - Qualcomm uC External Input Output Extension
2-
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqciio -riscv-no-aliases -show-encoding \
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqciio -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ENC,CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-xqciio < %s \
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# RUN: | llvm-objdump --mattr=+experimental-xqciio -M no-aliases --no-print-imm-hex -d - \

‎llvm/test/MC/RISCV/xqcilb-valid.s

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# Xqcilb - Qualcomm uC Long Branch Extension
2-
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcilb -riscv-no-aliases -show-encoding \
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcilb -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ENC,CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-xqcilb < %s \
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# RUN: | llvm-objdump --mattr=+experimental-xqcilb -M no-aliases --no-print-imm-hex -d - \

‎llvm/test/MC/RISCV/xqcili-li.s

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# Xqcili - Check aliases for li instruction
2-
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcili -riscv-no-aliases \
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcili -M no-aliases \
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# RUN: | FileCheck -check-prefixes=CHECK-INST %s
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# RUN: llvm-mc %s -triple=riscv32 -riscv-no-aliases \
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# RUN: llvm-mc %s -triple=riscv32 -M no-aliases \
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# RUN: | FileCheck -check-prefixes=CHECK-INST-RISCV32 %s
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# CHECK-INST: qc.li a0, 2048

‎llvm/test/MC/RISCV/xqcili-valid.s

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# Xqcili - Qualcomm uC Load Large Immediate Extension
2-
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcili -riscv-no-aliases -show-encoding \
2+
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcili -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ENC,CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-xqcili < %s \

‎llvm/test/MC/RISCV/xqcilia-valid.s

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# Xqcilia - Qualcomm uC Large Immediate Arithmetic extension
2-
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcilia -riscv-no-aliases -show-encoding \
2+
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcilia -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ENC,CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-xqcilia < %s \
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# RUN: | llvm-objdump --mattr=+experimental-xqcilia -M no-aliases --no-print-imm-hex -d - \

‎llvm/test/MC/RISCV/xqcilo-aliases-valid.s

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# Xqcilo - Qualcomm uC Large Offset Load Store extension
2-
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcilo -riscv-no-aliases -show-encoding \
2+
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcilo -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ENC,CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-xqcilo < %s \
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# RUN: | llvm-objdump --mattr=+experimental-xqcilo -M no-aliases --no-print-imm-hex -d - \

‎llvm/test/MC/RISCV/xqcilo-valid.s

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# Xqcilo - Qualcomm uC Large Offset Load Store extension
2-
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcilo -riscv-no-aliases -show-encoding \
2+
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcilo -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ENC,CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-xqcilo < %s \
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# RUN: | llvm-objdump --mattr=+experimental-xqcilo -M no-aliases --no-print-imm-hex -d - \

‎llvm/test/MC/RISCV/xqcisim-valid.s

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# Xqcisim - Simulation Hint Instructions
2-
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcisim -riscv-no-aliases -show-encoding \
2+
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcisim -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ENC,CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-xqcisim < %s \
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# RUN: | llvm-objdump --mattr=+experimental-xqcisim -M no-aliases --no-print-imm-hex -d - \

‎llvm/test/MC/RISCV/xqcisync-valid.s

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# Xqcisync - Qualcomm uC Sync Delay Extension
2-
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcisync -riscv-no-aliases -show-encoding \
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcisync -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ENC,CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-xqcisync < %s \
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# RUN: | llvm-objdump --mattr=+experimental-xqcisync -M no-aliases --no-print-imm-hex -d - \

‎llvm/test/MC/RISCV/xrivosvisni-valid.s

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# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xrivosvisni -riscv-no-aliases -show-encoding \
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xrivosvisni -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
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# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-xrivosvisni < %s \
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# RUN: | llvm-objdump --mattr=+experimental-xrivosvisni -M no-aliases --no-print-imm-hex -d -r - \
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# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
6-
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-xrivosvisni -riscv-no-aliases -show-encoding \
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# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-xrivosvisni -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-xrivosvisni < %s \
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# RUN: | llvm-objdump --mattr=+experimental-xrivosvisni -M no-aliases --no-print-imm-hex -d -r - \

‎llvm/test/MC/RISCV/xrivosvizip-valid.s

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# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xrivosvizip -riscv-no-aliases -show-encoding \
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xrivosvizip -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
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# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-xrivosvizip < %s \
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# RUN: | llvm-objdump --mattr=+experimental-xrivosvizip -M no-aliases -d -r - \
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# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
6-
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-xrivosvizip -riscv-no-aliases -show-encoding \
6+
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-xrivosvizip -M no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-xrivosvizip < %s \
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# RUN: | llvm-objdump --mattr=+experimental-xrivosvizip -M no-aliases -d -r - \

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