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; (x & y) + ~(x | y)
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define i32 @src (i32 %0 , i32 %1 ) {
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; CHECK-LABEL: @src(
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- ; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP1:%.*]], [[TMP0:%.*]]
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- ; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP1]], [[TMP0]]
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- ; CHECK-NEXT: [[TMP5:%.*]] = xor i32 [[TMP4]], -1
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- ; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP3]], [[TMP5]]
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- ; CHECK-NEXT: ret i32 [[TMP6]]
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+ ; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1:%.*]], [[TMP0:%.*]]
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+ ; CHECK-NEXT: [[TMP4:%.*]] = xor i32 [[TMP3]], -1
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+ ; CHECK-NEXT: ret i32 [[TMP4]]
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;
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%3 = and i32 %1 , %0
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%4 = or i32 %1 , %0
@@ -21,11 +19,9 @@ define i32 @src(i32 %0, i32 %1) {
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; vector version of src
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define <2 x i32 > @src_vec (<2 x i32 > %0 , <2 x i32 > %1 ) {
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; CHECK-LABEL: @src_vec(
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- ; CHECK-NEXT: [[TMP3:%.*]] = and <2 x i32> [[TMP1:%.*]], [[TMP0:%.*]]
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- ; CHECK-NEXT: [[TMP4:%.*]] = or <2 x i32> [[TMP1]], [[TMP0]]
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- ; CHECK-NEXT: [[TMP5:%.*]] = xor <2 x i32> [[TMP4]], <i32 -1, i32 -1>
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- ; CHECK-NEXT: [[TMP6:%.*]] = add <2 x i32> [[TMP3]], [[TMP5]]
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- ; CHECK-NEXT: ret <2 x i32> [[TMP6]]
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+ ; CHECK-NEXT: [[TMP3:%.*]] = xor <2 x i32> [[TMP1:%.*]], [[TMP0:%.*]]
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+ ; CHECK-NEXT: [[TMP4:%.*]] = xor <2 x i32> [[TMP3]], <i32 -1, i32 -1>
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+ ; CHECK-NEXT: ret <2 x i32> [[TMP4]]
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;
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%3 = and <2 x i32 > %1 , %0
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%4 = or <2 x i32 > %1 , %0
@@ -37,11 +33,9 @@ define <2 x i32> @src_vec(<2 x i32> %0, <2 x i32> %1) {
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; vector version of src with undef values
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define <2 x i32 > @src_vec_undef (<2 x i32 > %0 , <2 x i32 > %1 ) {
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; CHECK-LABEL: @src_vec_undef(
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- ; CHECK-NEXT: [[TMP3:%.*]] = and <2 x i32> [[TMP1:%.*]], [[TMP0:%.*]]
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- ; CHECK-NEXT: [[TMP4:%.*]] = or <2 x i32> [[TMP1]], [[TMP0]]
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- ; CHECK-NEXT: [[TMP5:%.*]] = xor <2 x i32> [[TMP4]], <i32 -1, i32 undef>
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- ; CHECK-NEXT: [[TMP6:%.*]] = add <2 x i32> [[TMP3]], [[TMP5]]
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- ; CHECK-NEXT: ret <2 x i32> [[TMP6]]
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+ ; CHECK-NEXT: [[TMP3:%.*]] = xor <2 x i32> [[TMP1:%.*]], [[TMP0:%.*]]
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+ ; CHECK-NEXT: [[TMP4:%.*]] = xor <2 x i32> [[TMP3]], <i32 -1, i32 -1>
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+ ; CHECK-NEXT: ret <2 x i32> [[TMP4]]
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;
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%3 = and <2 x i32 > %1 , %0
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%4 = or <2 x i32 > %1 , %0
@@ -53,11 +47,9 @@ define <2 x i32> @src_vec_undef(<2 x i32> %0, <2 x i32> %1) {
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; (x & y) + ~(y | x)
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define i32 @src2 (i32 %0 , i32 %1 ) {
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; CHECK-LABEL: @src2(
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- ; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP1:%.*]], [[TMP0:%.*]]
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- ; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP0]], [[TMP1]]
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- ; CHECK-NEXT: [[TMP5:%.*]] = xor i32 [[TMP4]], -1
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- ; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP3]], [[TMP5]]
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- ; CHECK-NEXT: ret i32 [[TMP6]]
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+ ; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1:%.*]], [[TMP0:%.*]]
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+ ; CHECK-NEXT: [[TMP4:%.*]] = xor i32 [[TMP3]], -1
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+ ; CHECK-NEXT: ret i32 [[TMP4]]
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;
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%3 = and i32 %1 , %0
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%4 = or i32 %0 , %1
@@ -69,11 +61,9 @@ define i32 @src2(i32 %0, i32 %1) {
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; (x & y) + (~x & ~y)
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define i32 @src3 (i32 %0 , i32 %1 ) {
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; CHECK-LABEL: @src3(
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- ; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP1:%.*]], [[TMP0:%.*]]
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- ; CHECK-NEXT: [[DOTDEMORGAN:%.*]] = or i32 [[TMP0]], [[TMP1]]
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- ; CHECK-NEXT: [[TMP4:%.*]] = xor i32 [[DOTDEMORGAN]], -1
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- ; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP3]], [[TMP4]]
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- ; CHECK-NEXT: ret i32 [[TMP5]]
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+ ; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1:%.*]], [[TMP0:%.*]]
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+ ; CHECK-NEXT: [[TMP4:%.*]] = xor i32 [[TMP3]], -1
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+ ; CHECK-NEXT: ret i32 [[TMP4]]
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;
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%3 = and i32 %1 , %0
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%4 = xor i32 %0 , -1
@@ -86,11 +76,9 @@ define i32 @src3(i32 %0, i32 %1) {
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; ~(x | y) + (y & x)
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define i32 @src4 (i32 %0 , i32 %1 ) {
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; CHECK-LABEL: @src4(
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- ; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP0:%.*]], [[TMP1:%.*]]
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- ; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP1]], [[TMP0]]
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- ; CHECK-NEXT: [[TMP5:%.*]] = xor i32 [[TMP4]], -1
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- ; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP3]], [[TMP5]]
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- ; CHECK-NEXT: ret i32 [[TMP6]]
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+ ; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP0:%.*]], [[TMP1:%.*]]
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+ ; CHECK-NEXT: [[TMP4:%.*]] = xor i32 [[TMP3]], -1
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+ ; CHECK-NEXT: ret i32 [[TMP4]]
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;
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%3 = and i32 %0 , %1
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%4 = or i32 %1 , %0
@@ -102,11 +90,9 @@ define i32 @src4(i32 %0, i32 %1) {
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; ~(x | y) + (x & y)
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define i32 @src5 (i32 %0 , i32 %1 ) {
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; CHECK-LABEL: @src5(
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- ; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP1:%.*]], [[TMP0:%.*]]
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+ ; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1:%.*]], [[TMP0:%.*]]
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; CHECK-NEXT: [[TMP4:%.*]] = xor i32 [[TMP3]], -1
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- ; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP1]], [[TMP0]]
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- ; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP5]], [[TMP4]]
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- ; CHECK-NEXT: ret i32 [[TMP6]]
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+ ; CHECK-NEXT: ret i32 [[TMP4]]
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;
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%3 = or i32 %1 , %0
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%4 = xor i32 %3 , -1
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