Skip to content

Commit a2a0089

Browse files
RKSimonRKSimon
authored
[X86] movsd/movss/movd/movq - add support for constant comments (#78601)
If we're loading a constant value, print the constant (and the zero upper elements) instead of just the shuffle mask. This did require me to move the shuffle mask handling into addConstantComments as we can't handle this in the MC layer.
1 parent d54dfdd commit a2a0089

File tree

110 files changed

+2092
-2038
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

110 files changed

+2092
-2038
lines changed

‎lld/test/MachO/lto-mattrs.ll

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -19,8 +19,7 @@
1919
; NO-FMA: <_foo>:
2020
; NO-FMA-NEXT: vrcpss %xmm0, %xmm0, %xmm1
2121
; NO-FMA-NEXT: vmulss %xmm1, %xmm0, %xmm0
22-
; NO-FMA-NEXT: vmovss [[#]](%rip), %xmm2 ## xmm2 =
23-
; NO-FMA-NEXT: ## 0x
22+
; NO-FMA-NEXT: vmovss [[#]](%rip), %xmm2 ## 0x
2423
; NO-FMA-NEXT: vsubss %xmm0, %xmm2, %xmm0
2524
; NO-FMA-NEXT: vmulss %xmm0, %xmm1, %xmm0
2625
; NO-FMA-NEXT: vaddss %xmm0, %xmm1, %xmm0

‎llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp

Lines changed: 2 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -1212,15 +1212,7 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
12121212
case X86::VMOVSDZrr:
12131213
Src2Name = getRegName(MI->getOperand(2).getReg());
12141214
Src1Name = getRegName(MI->getOperand(1).getReg());
1215-
[[fallthrough]];
1216-
1217-
case X86::MOVSDrm_alt:
1218-
case X86::MOVSDrm:
1219-
case X86::VMOVSDrm_alt:
1220-
case X86::VMOVSDrm:
1221-
case X86::VMOVSDZrm:
1222-
case X86::VMOVSDZrm_alt:
1223-
DecodeScalarMoveMask(2, nullptr == Src2Name, ShuffleMask);
1215+
DecodeScalarMoveMask(2, false, ShuffleMask);
12241216
DestName = getRegName(MI->getOperand(0).getReg());
12251217
break;
12261218

@@ -1229,15 +1221,7 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
12291221
case X86::VMOVSSZrr:
12301222
Src2Name = getRegName(MI->getOperand(2).getReg());
12311223
Src1Name = getRegName(MI->getOperand(1).getReg());
1232-
[[fallthrough]];
1233-
1234-
case X86::MOVSSrm:
1235-
case X86::MOVSSrm_alt:
1236-
case X86::VMOVSSrm:
1237-
case X86::VMOVSSrm_alt:
1238-
case X86::VMOVSSZrm:
1239-
case X86::VMOVSSZrm_alt:
1240-
DecodeScalarMoveMask(4, nullptr == Src2Name, ShuffleMask);
1224+
DecodeScalarMoveMask(4, false, ShuffleMask);
12411225
DestName = getRegName(MI->getOperand(0).getReg());
12421226
break;
12431227

@@ -1248,22 +1232,10 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
12481232
case X86::VMOVZPQILo2PQIrr:
12491233
case X86::VMOVZPQILo2PQIZrr:
12501234
Src1Name = getRegName(MI->getOperand(1).getReg());
1251-
[[fallthrough]];
1252-
1253-
case X86::MOVQI2PQIrm:
1254-
case X86::VMOVQI2PQIrm:
1255-
case X86::VMOVQI2PQIZrm:
12561235
DecodeZeroMoveLowMask(2, ShuffleMask);
12571236
DestName = getRegName(MI->getOperand(0).getReg());
12581237
break;
12591238

1260-
case X86::MOVDI2PDIrm:
1261-
case X86::VMOVDI2PDIrm:
1262-
case X86::VMOVDI2PDIZrm:
1263-
DecodeZeroMoveLowMask(4, ShuffleMask);
1264-
DestName = getRegName(MI->getOperand(0).getReg());
1265-
break;
1266-
12671239
case X86::EXTRQI:
12681240
if (MI->getOperand(2).isImm() &&
12691241
MI->getOperand(3).isImm())

‎llvm/lib/Target/X86/X86MCInstLower.cpp

Lines changed: 90 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1806,6 +1806,96 @@ static void addConstantComments(const MachineInstr *MI,
18061806
break;
18071807
}
18081808

1809+
case X86::MOVSDrm:
1810+
case X86::MOVSSrm:
1811+
case X86::VMOVSDrm:
1812+
case X86::VMOVSSrm:
1813+
case X86::VMOVSDZrm:
1814+
case X86::VMOVSSZrm:
1815+
case X86::MOVSDrm_alt:
1816+
case X86::MOVSSrm_alt:
1817+
case X86::VMOVSDrm_alt:
1818+
case X86::VMOVSSrm_alt:
1819+
case X86::VMOVSDZrm_alt:
1820+
case X86::VMOVSSZrm_alt:
1821+
case X86::MOVDI2PDIrm:
1822+
case X86::MOVQI2PQIrm:
1823+
case X86::VMOVDI2PDIrm:
1824+
case X86::VMOVQI2PQIrm:
1825+
case X86::VMOVDI2PDIZrm:
1826+
case X86::VMOVQI2PQIZrm: {
1827+
assert(MI->getNumOperands() >= (1 + X86::AddrNumOperands) &&
1828+
"Unexpected number of operands!");
1829+
int SclWidth = 32;
1830+
int VecWidth = 128;
1831+
1832+
switch (MI->getOpcode()) {
1833+
default:
1834+
llvm_unreachable("Invalid opcode");
1835+
case X86::MOVSDrm:
1836+
case X86::VMOVSDrm:
1837+
case X86::VMOVSDZrm:
1838+
case X86::MOVSDrm_alt:
1839+
case X86::VMOVSDrm_alt:
1840+
case X86::VMOVSDZrm_alt:
1841+
case X86::MOVQI2PQIrm:
1842+
case X86::VMOVQI2PQIrm:
1843+
case X86::VMOVQI2PQIZrm:
1844+
SclWidth = 64;
1845+
VecWidth = 128;
1846+
break;
1847+
case X86::MOVSSrm:
1848+
case X86::VMOVSSrm:
1849+
case X86::VMOVSSZrm:
1850+
case X86::MOVSSrm_alt:
1851+
case X86::VMOVSSrm_alt:
1852+
case X86::VMOVSSZrm_alt:
1853+
case X86::MOVDI2PDIrm:
1854+
case X86::VMOVDI2PDIrm:
1855+
case X86::VMOVDI2PDIZrm:
1856+
SclWidth = 32;
1857+
VecWidth = 128;
1858+
break;
1859+
}
1860+
std::string Comment;
1861+
raw_string_ostream CS(Comment);
1862+
const MachineOperand &DstOp = MI->getOperand(0);
1863+
CS << X86ATTInstPrinter::getRegisterName(DstOp.getReg()) << " = ";
1864+
1865+
if (auto *C =
1866+
X86::getConstantFromPool(*MI, MI->getOperand(1 + X86::AddrDisp))) {
1867+
if (SclWidth == C->getType()->getScalarSizeInBits()) {
1868+
if (auto *CI = dyn_cast<ConstantInt>(C)) {
1869+
CS << "[";
1870+
printConstant(CI->getValue(), CS);
1871+
for (int I = 1, E = VecWidth / SclWidth; I < E; ++I) {
1872+
CS << ",0";
1873+
}
1874+
CS << "]";
1875+
OutStreamer.AddComment(CS.str());
1876+
break; // early-out
1877+
}
1878+
if (auto *CF = dyn_cast<ConstantFP>(C)) {
1879+
CS << "[";
1880+
printConstant(CF->getValue(), CS);
1881+
APFloat ZeroFP = APFloat::getZero(CF->getValue().getSemantics());
1882+
for (int I = 1, E = VecWidth / SclWidth; I < E; ++I) {
1883+
CS << ",";
1884+
printConstant(ZeroFP, CS);
1885+
}
1886+
CS << "]";
1887+
OutStreamer.AddComment(CS.str());
1888+
break; // early-out
1889+
}
1890+
}
1891+
}
1892+
1893+
// We didn't find a constant load, fallback to a shuffle mask decode.
1894+
CS << (SclWidth == 32 ? "mem[0],zero,zero,zero" : "mem[0],zero");
1895+
OutStreamer.AddComment(CS.str());
1896+
break;
1897+
}
1898+
18091899
#define MOV_CASE(Prefix, Suffix) \
18101900
case X86::Prefix##MOVAPD##Suffix##rm: \
18111901
case X86::Prefix##MOVAPS##Suffix##rm: \

‎llvm/test/CodeGen/X86/2008-09-25-sseregparm-1.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5,15 +5,15 @@
55
define inreg double @foo1() nounwind {
66
; CHECK-LABEL: foo1:
77
; CHECK: # %bb.0:
8-
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
8+
; CHECK-NEXT: movsd {{.*#+}} xmm0 = [1.0E+0,0.0E+0]
99
; CHECK-NEXT: retl
1010
ret double 1.0
1111
}
1212

1313
define inreg float @foo2() nounwind {
1414
; CHECK-LABEL: foo2:
1515
; CHECK: # %bb.0:
16-
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
16+
; CHECK-NEXT: movss {{.*#+}} xmm0 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]
1717
; CHECK-NEXT: retl
1818
ret float 1.0
1919
}

‎llvm/test/CodeGen/X86/GlobalISel/fconstant.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@
88
define void @test_float(ptr %a , float %b) {
99
; CHECK64_SMALL-LABEL: test_float:
1010
; CHECK64_SMALL: # %bb.0: # %entry
11-
; CHECK64_SMALL-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
11+
; CHECK64_SMALL-NEXT: movss {{.*#+}} xmm1 = [5.5E+0,0.0E+0,0.0E+0,0.0E+0]
1212
; CHECK64_SMALL-NEXT: addss %xmm0, %xmm1
1313
; CHECK64_SMALL-NEXT: movd %xmm1, %eax
1414
; CHECK64_SMALL-NEXT: movl %eax, (%rdi)
@@ -26,7 +26,7 @@ define void @test_float(ptr %a , float %b) {
2626
; CHECK32: # %bb.0: # %entry
2727
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
2828
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
29-
; CHECK32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
29+
; CHECK32-NEXT: movss {{.*#+}} xmm0 = [5.5E+0,0.0E+0,0.0E+0,0.0E+0]
3030
; CHECK32-NEXT: movd %ecx, %xmm1
3131
; CHECK32-NEXT: addss %xmm0, %xmm1
3232
; CHECK32-NEXT: movd %xmm1, %ecx

‎llvm/test/CodeGen/X86/asm-reg-type-mismatch-avx512.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@ define i64 @test1() nounwind {
55
; CHECK-LABEL: test1:
66
; CHECK: # %bb.0: # %entry
77
; CHECK-NEXT: #APP
8-
; CHECK-NEXT: vmovq {{.*#+}} xmm16 = mem[0],zero
8+
; CHECK-NEXT: vmovq 0, %xmm16
99
; CHECK-NEXT: #NO_APP
1010
; CHECK-NEXT: vmovq %xmm16, %rax
1111
; CHECK-NEXT: retq

‎llvm/test/CodeGen/X86/atomic-fp.ll

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -207,28 +207,28 @@ define dso_local void @fadd_32g() nounwind {
207207
;
208208
; X86-SSE2-LABEL: fadd_32g:
209209
; X86-SSE2: # %bb.0:
210-
; X86-SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
210+
; X86-SSE2-NEXT: movss {{.*#+}} xmm0 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]
211211
; X86-SSE2-NEXT: addss glob32, %xmm0
212212
; X86-SSE2-NEXT: movss %xmm0, glob32
213213
; X86-SSE2-NEXT: retl
214214
;
215215
; X86-AVX-LABEL: fadd_32g:
216216
; X86-AVX: # %bb.0:
217-
; X86-AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
217+
; X86-AVX-NEXT: vmovss {{.*#+}} xmm0 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]
218218
; X86-AVX-NEXT: vaddss glob32, %xmm0, %xmm0
219219
; X86-AVX-NEXT: vmovss %xmm0, glob32
220220
; X86-AVX-NEXT: retl
221221
;
222222
; X64-SSE-LABEL: fadd_32g:
223223
; X64-SSE: # %bb.0:
224-
; X64-SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
224+
; X64-SSE-NEXT: movss {{.*#+}} xmm0 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]
225225
; X64-SSE-NEXT: addss glob32(%rip), %xmm0
226226
; X64-SSE-NEXT: movss %xmm0, glob32(%rip)
227227
; X64-SSE-NEXT: retq
228228
;
229229
; X64-AVX-LABEL: fadd_32g:
230230
; X64-AVX: # %bb.0:
231-
; X64-AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
231+
; X64-AVX-NEXT: vmovss {{.*#+}} xmm0 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]
232232
; X64-AVX-NEXT: vaddss glob32(%rip), %xmm0, %xmm0
233233
; X64-AVX-NEXT: vmovss %xmm0, glob32(%rip)
234234
; X64-AVX-NEXT: retq
@@ -319,14 +319,14 @@ define dso_local void @fadd_64g() nounwind {
319319
;
320320
; X64-SSE-LABEL: fadd_64g:
321321
; X64-SSE: # %bb.0:
322-
; X64-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
322+
; X64-SSE-NEXT: movsd {{.*#+}} xmm0 = [1.0E+0,0.0E+0]
323323
; X64-SSE-NEXT: addsd glob64(%rip), %xmm0
324324
; X64-SSE-NEXT: movsd %xmm0, glob64(%rip)
325325
; X64-SSE-NEXT: retq
326326
;
327327
; X64-AVX-LABEL: fadd_64g:
328328
; X64-AVX: # %bb.0:
329-
; X64-AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
329+
; X64-AVX-NEXT: vmovsd {{.*#+}} xmm0 = [1.0E+0,0.0E+0]
330330
; X64-AVX-NEXT: vaddsd glob64(%rip), %xmm0, %xmm0
331331
; X64-AVX-NEXT: vmovsd %xmm0, glob64(%rip)
332332
; X64-AVX-NEXT: retq
@@ -368,30 +368,30 @@ define dso_local void @fadd_32imm() nounwind {
368368
;
369369
; X86-SSE2-LABEL: fadd_32imm:
370370
; X86-SSE2: # %bb.0:
371-
; X86-SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
371+
; X86-SSE2-NEXT: movss {{.*#+}} xmm0 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]
372372
; X86-SSE2-NEXT: addss -559038737, %xmm0
373373
; X86-SSE2-NEXT: movss %xmm0, -559038737
374374
; X86-SSE2-NEXT: retl
375375
;
376376
; X86-AVX-LABEL: fadd_32imm:
377377
; X86-AVX: # %bb.0:
378-
; X86-AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
378+
; X86-AVX-NEXT: vmovss {{.*#+}} xmm0 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]
379379
; X86-AVX-NEXT: vaddss -559038737, %xmm0, %xmm0
380380
; X86-AVX-NEXT: vmovss %xmm0, -559038737
381381
; X86-AVX-NEXT: retl
382382
;
383383
; X64-SSE-LABEL: fadd_32imm:
384384
; X64-SSE: # %bb.0:
385385
; X64-SSE-NEXT: movl $3735928559, %eax # imm = 0xDEADBEEF
386-
; X64-SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
386+
; X64-SSE-NEXT: movss {{.*#+}} xmm0 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]
387387
; X64-SSE-NEXT: addss (%rax), %xmm0
388388
; X64-SSE-NEXT: movss %xmm0, (%rax)
389389
; X64-SSE-NEXT: retq
390390
;
391391
; X64-AVX-LABEL: fadd_32imm:
392392
; X64-AVX: # %bb.0:
393393
; X64-AVX-NEXT: movl $3735928559, %eax # imm = 0xDEADBEEF
394-
; X64-AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
394+
; X64-AVX-NEXT: vmovss {{.*#+}} xmm0 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]
395395
; X64-AVX-NEXT: vaddss (%rax), %xmm0, %xmm0
396396
; X64-AVX-NEXT: vmovss %xmm0, (%rax)
397397
; X64-AVX-NEXT: retq
@@ -483,15 +483,15 @@ define dso_local void @fadd_64imm() nounwind {
483483
; X64-SSE-LABEL: fadd_64imm:
484484
; X64-SSE: # %bb.0:
485485
; X64-SSE-NEXT: movl $3735928559, %eax # imm = 0xDEADBEEF
486-
; X64-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
486+
; X64-SSE-NEXT: movsd {{.*#+}} xmm0 = [1.0E+0,0.0E+0]
487487
; X64-SSE-NEXT: addsd (%rax), %xmm0
488488
; X64-SSE-NEXT: movsd %xmm0, (%rax)
489489
; X64-SSE-NEXT: retq
490490
;
491491
; X64-AVX-LABEL: fadd_64imm:
492492
; X64-AVX: # %bb.0:
493493
; X64-AVX-NEXT: movl $3735928559, %eax # imm = 0xDEADBEEF
494-
; X64-AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
494+
; X64-AVX-NEXT: vmovsd {{.*#+}} xmm0 = [1.0E+0,0.0E+0]
495495
; X64-AVX-NEXT: vaddsd (%rax), %xmm0, %xmm0
496496
; X64-AVX-NEXT: vmovsd %xmm0, (%rax)
497497
; X64-AVX-NEXT: retq
@@ -534,7 +534,7 @@ define dso_local void @fadd_32stack() nounwind {
534534
; X86-SSE2-LABEL: fadd_32stack:
535535
; X86-SSE2: # %bb.0:
536536
; X86-SSE2-NEXT: pushl %eax
537-
; X86-SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
537+
; X86-SSE2-NEXT: movss {{.*#+}} xmm0 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]
538538
; X86-SSE2-NEXT: addss (%esp), %xmm0
539539
; X86-SSE2-NEXT: movss %xmm0, (%esp)
540540
; X86-SSE2-NEXT: popl %eax
@@ -543,22 +543,22 @@ define dso_local void @fadd_32stack() nounwind {
543543
; X86-AVX-LABEL: fadd_32stack:
544544
; X86-AVX: # %bb.0:
545545
; X86-AVX-NEXT: pushl %eax
546-
; X86-AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
546+
; X86-AVX-NEXT: vmovss {{.*#+}} xmm0 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]
547547
; X86-AVX-NEXT: vaddss (%esp), %xmm0, %xmm0
548548
; X86-AVX-NEXT: vmovss %xmm0, (%esp)
549549
; X86-AVX-NEXT: popl %eax
550550
; X86-AVX-NEXT: retl
551551
;
552552
; X64-SSE-LABEL: fadd_32stack:
553553
; X64-SSE: # %bb.0:
554-
; X64-SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
554+
; X64-SSE-NEXT: movss {{.*#+}} xmm0 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]
555555
; X64-SSE-NEXT: addss -{{[0-9]+}}(%rsp), %xmm0
556556
; X64-SSE-NEXT: movss %xmm0, -{{[0-9]+}}(%rsp)
557557
; X64-SSE-NEXT: retq
558558
;
559559
; X64-AVX-LABEL: fadd_32stack:
560560
; X64-AVX: # %bb.0:
561-
; X64-AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
561+
; X64-AVX-NEXT: vmovss {{.*#+}} xmm0 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]
562562
; X64-AVX-NEXT: vaddss -{{[0-9]+}}(%rsp), %xmm0, %xmm0
563563
; X64-AVX-NEXT: vmovss %xmm0, -{{[0-9]+}}(%rsp)
564564
; X64-AVX-NEXT: retq
@@ -650,14 +650,14 @@ define dso_local void @fadd_64stack() nounwind {
650650
;
651651
; X64-SSE-LABEL: fadd_64stack:
652652
; X64-SSE: # %bb.0:
653-
; X64-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
653+
; X64-SSE-NEXT: movsd {{.*#+}} xmm0 = [1.0E+0,0.0E+0]
654654
; X64-SSE-NEXT: addsd -{{[0-9]+}}(%rsp), %xmm0
655655
; X64-SSE-NEXT: movsd %xmm0, -{{[0-9]+}}(%rsp)
656656
; X64-SSE-NEXT: retq
657657
;
658658
; X64-AVX-LABEL: fadd_64stack:
659659
; X64-AVX: # %bb.0:
660-
; X64-AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
660+
; X64-AVX-NEXT: vmovsd {{.*#+}} xmm0 = [1.0E+0,0.0E+0]
661661
; X64-AVX-NEXT: vaddsd -{{[0-9]+}}(%rsp), %xmm0, %xmm0
662662
; X64-AVX-NEXT: vmovsd %xmm0, -{{[0-9]+}}(%rsp)
663663
; X64-AVX-NEXT: retq

‎llvm/test/CodeGen/X86/avx512-cmp.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -70,7 +70,7 @@ define float @test5(float %p) #0 {
7070
; ALL-NEXT: retq
7171
; ALL-NEXT: LBB3_1: ## %if.end
7272
; ALL-NEXT: vcmpltss %xmm0, %xmm1, %k1
73-
; ALL-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
73+
; ALL-NEXT: vmovss {{.*#+}} xmm0 = [-1.0E+0,0.0E+0,0.0E+0,0.0E+0]
7474
; ALL-NEXT: vmovss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 {%k1}
7575
; ALL-NEXT: retq
7676
entry:

‎llvm/test/CodeGen/X86/avx512-fma-intrinsics.ll

Lines changed: 6 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1150,19 +1150,12 @@ define <16 x float>@test_int_x86_avx512_mask_vfnmadd_ps_512(<16 x float> %x0, <1
11501150

11511151
; This test case used to crash due to combineFMA not bitcasting results of isFNEG.
11521152
define <4 x float> @foo() {
1153-
; X86-LABEL: foo:
1154-
; X86: # %bb.0: # %entry
1155-
; X86-NEXT: vmovss (%eax), %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xfa,0x10,0x00]
1156-
; X86-NEXT: # xmm0 = mem[0],zero,zero,zero
1157-
; X86-NEXT: vfmsub213ss {rd-sae}, %xmm0, %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7d,0x38,0xab,0xc0]
1158-
; X86-NEXT: retl # encoding: [0xc3]
1159-
;
1160-
; X64-LABEL: foo:
1161-
; X64: # %bb.0: # %entry
1162-
; X64-NEXT: vmovss (%rax), %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xfa,0x10,0x00]
1163-
; X64-NEXT: # xmm0 = mem[0],zero,zero,zero
1164-
; X64-NEXT: vfmsub213ss {rd-sae}, %xmm0, %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7d,0x38,0xab,0xc0]
1165-
; X64-NEXT: retq # encoding: [0xc3]
1153+
; CHECK-LABEL: foo:
1154+
; CHECK: # %bb.0: # %entry
1155+
; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1156+
; CHECK-NEXT: # EVEX TO VEX Compression encoding: [0xc5,0xfa,0x10,0x00]
1157+
; CHECK-NEXT: vfmsub213ss {rd-sae}, %xmm0, %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7d,0x38,0xab,0xc0]
1158+
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
11661159
entry:
11671160
%0 = load <4 x float>, ptr undef, align 16
11681161
%sub = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %0

0 commit comments

Comments
 (0)