Revert "Implement convergence control in MIR using SelectionDAG (#71785)"

This reverts commit 7988973.

Encountered multiple buildbot failures.

Author: ssahasra

llvm/include/llvm/ADT/GenericConvergenceVerifier.h

@@ -32,12 +32,11 @@ template <typename ContextT> class GenericConvergenceVerifier {
 
   void initialize(raw_ostream *OS,
                   function_ref<void(const Twine &Message)> FailureCB,
-                  const FunctionT &F, bool _IsSSA) {
+                  const FunctionT &F) {
     clear();
     this->OS = OS;
     this->FailureCB = FailureCB;
     Context = ContextT(&F);
-    IsSSA = _IsSSA;
   }
 
   void clear();
@@ -53,7 +52,6 @@ template <typename ContextT> class GenericConvergenceVerifier {
   DominatorTreeT *DT;
   CycleInfoT CI;
   ContextT Context;
-  bool IsSSA;
 
   /// Whether the current function has convergencectrl operand bundles.
   enum {
@@ -62,10 +60,6 @@ template <typename ContextT> class GenericConvergenceVerifier {
     NoConvergence
   } ConvergenceKind = NoConvergence;
 
-  /// The control token operation performed by a convergence control Intrinsic
-  /// in LLVM IR, or by a CONVERGENCECTRL* instruction in MIR
-  enum ConvOpKind { CONV_ANCHOR, CONV_ENTRY, CONV_LOOP, CONV_NONE };
-
   // Cache token uses found so far. Note that we track the unique definitions
   // and not the token values.
   DenseMap<const InstructionT *, const InstructionT *> Tokens;
@@ -74,7 +68,6 @@ template <typename ContextT> class GenericConvergenceVerifier {
 
   static bool isInsideConvergentFunction(const InstructionT &I);
   static bool isConvergent(const InstructionT &I);
-  static ConvOpKind getConvOp(const InstructionT &I);
   const InstructionT *findAndCheckConvergenceTokenUsed(const InstructionT &I);
 
   void reportFailure(const Twine &Message, ArrayRef<Printable> Values);

llvm/include/llvm/CodeGen/FunctionLoweringInfo.h

@@ -215,7 +215,15 @@ class FunctionLoweringInfo {
 
   Register CreateRegs(Type *Ty, bool isDivergent = false);
 
-  Register InitializeRegForValue(const Value *V);
+  Register InitializeRegForValue(const Value *V) {
+    // Tokens never live in vregs.
+    if (V->getType()->isTokenTy())
+      return 0;
+    Register &R = ValueMap[V];
+    assert(R == 0 && "Already initialized this value register!");
+    assert(VirtReg2Value.empty());
+    return R = CreateRegs(V);
+  }
 
   /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
   /// register is a PHI destination and the PHI's LiveOutInfo is not valid.

llvm/include/llvm/CodeGen/ISDOpcodes.h

@@ -1384,15 +1384,6 @@ enum NodeType {
 #define BEGIN_REGISTER_VP_SDNODE(VPSDID, ...) VPSDID,
 #include "llvm/IR/VPIntrinsics.def"
 
-  // The `llvm.experimental.convergence.*` intrinsics.
-  CONVERGENCECTRL_ANCHOR,
-  CONVERGENCECTRL_ENTRY,
-  CONVERGENCECTRL_LOOP,
-  // This does not correspond to any convergence control intrinsic. It used to
-  // glue a convergence control token to a convergent operation in the DAG,
-  // which is later translated to an implicit use in the MIR.
-  CONVERGENCECTRL_GLUE,
-
   /// BUILTIN_OP_END - This must be the last enum value in this list.
   /// The target-specific pre-isel opcode values start here.
   BUILTIN_OP_END

llvm/include/llvm/CodeGen/MachineConvergenceVerifier.h

@@ -459,10 +459,6 @@ class SelectionDAGISel : public MachineFunctionPass {
   void Select_ARITH_FENCE(SDNode *N);
   void Select_MEMBARRIER(SDNode *N);
 
-  void Select_CONVERGENCECTRL_ANCHOR(SDNode *N);
-  void Select_CONVERGENCECTRL_ENTRY(SDNode *N);
-  void Select_CONVERGENCECTRL_LOOP(SDNode *N);
-
   void pushStackMapLiveVariable(SmallVectorImpl<SDValue> &Ops, SDValue Operand,
                                 SDLoc DL);
   void Select_STACKMAP(SDNode *N);

llvm/include/llvm/CodeGen/SelectionDAGISel.h

@@ -4401,7 +4401,6 @@ class TargetLowering : public TargetLoweringBase {
     SmallVector<ISD::InputArg, 32> Ins;
     SmallVector<SDValue, 4> InVals;
     const ConstantInt *CFIType = nullptr;
-    SDValue ConvergenceControlToken;
 
     CallLoweringInfo(SelectionDAG &DAG)
         : RetSExt(false), RetZExt(false), IsVarArg(false), IsInReg(false),
@@ -4535,11 +4534,6 @@ class TargetLowering : public TargetLoweringBase {
       return *this;
     }
 
-    CallLoweringInfo &setConvergenceControlToken(SDValue Token) {
-      ConvergenceControlToken = Token;
-      return *this;
-    }
-
     ArgListTy &getArgs() {
       return Args;
     }

llvm/include/llvm/CodeGen/TargetLowering.h

@@ -52,7 +52,6 @@ template <class ContextT> void GenericConvergenceVerifier<ContextT>::clear() {
   Tokens.clear();
   CI.clear();
   ConvergenceKind = NoConvergence;
-  IsSSA = false;
 }
 
 template <class ContextT>
@@ -62,16 +61,12 @@ void GenericConvergenceVerifier<ContextT>::visit(const BlockT &BB) {
 
 template <class ContextT>
 void GenericConvergenceVerifier<ContextT>::visit(const InstructionT &I) {
-  ConvOpKind ConvOp = getConvOp(I);
-  if (!IsSSA) {
-    Check(ConvOp == CONV_NONE, "Convergence control requires SSA.",
-          {Context.print(&I)});
-    return;
-  }
+  auto ID = ContextT::getIntrinsicID(I);
   auto *TokenDef = findAndCheckConvergenceTokenUsed(I);
+  bool IsCtrlIntrinsic = true;
 
-  switch (ConvOp) {
-  case CONV_ENTRY:
+  switch (ID) {
+  case Intrinsic::experimental_convergence_entry:
     Check(isInsideConvergentFunction(I),
           "Entry intrinsic can occur only in a convergent function.",
           {Context.print(&I)});
@@ -83,13 +78,13 @@ void GenericConvergenceVerifier<ContextT>::visit(const InstructionT &I) {
           "same basic block.",
           {Context.print(&I)});
     LLVM_FALLTHROUGH;
-  case CONV_ANCHOR:
+  case Intrinsic::experimental_convergence_anchor:
     Check(!TokenDef,
           "Entry or anchor intrinsic cannot have a convergencectrl token "
           "operand.",
           {Context.print(&I)});
     break;
-  case CONV_LOOP:
+  case Intrinsic::experimental_convergence_loop:
     Check(TokenDef, "Loop intrinsic must have a convergencectrl token operand.",
           {Context.print(&I)});
     Check(!SeenFirstConvOp,
@@ -98,13 +93,14 @@ void GenericConvergenceVerifier<ContextT>::visit(const InstructionT &I) {
           {Context.print(&I)});
     break;
   default:
+    IsCtrlIntrinsic = false;
     break;
   }
 
   if (isConvergent(I))
     SeenFirstConvOp = true;
 
-  if (TokenDef || ConvOp != CONV_NONE) {
+  if (TokenDef || IsCtrlIntrinsic) {
     Check(isConvergent(I),
           "Convergence control token can only be used in a convergent call.",
           {Context.print(&I)});
@@ -165,7 +161,8 @@ void GenericConvergenceVerifier<ContextT>::verify(const DominatorTreeT &DT) {
       return;
     }
 
-    Check(getConvOp(*User) == CONV_LOOP,
+    Check(ContextT::getIntrinsicID(*User) ==
+              Intrinsic::experimental_convergence_loop,
           "Convergence token used by an instruction other than "
           "llvm.experimental.convergence.loop in a cycle that does "
           "not contain the token's definition.",
@@ -202,7 +199,7 @@ void GenericConvergenceVerifier<ContextT>::verify(const DominatorTreeT &DT) {
     for (auto &I : *BB) {
       if (auto *Token = Tokens.lookup(&I))
         checkToken(Token, &I, LiveTokens);
-      if (getConvOp(I) != CONV_NONE)
+      if (isConvergenceControlIntrinsic(ContextT::getIntrinsicID(I)))
         LiveTokens.push_back(&I);
     }
 

llvm/include/llvm/IR/GenericConvergenceVerifierImpl.h

@@ -225,11 +225,6 @@ HANDLE_TARGET_OPCODE(MEMBARRIER)
 // using.
 HANDLE_TARGET_OPCODE(JUMP_TABLE_DEBUG_INFO)
 
-HANDLE_TARGET_OPCODE(CONVERGENCECTRL_ENTRY)
-HANDLE_TARGET_OPCODE(CONVERGENCECTRL_ANCHOR)
-HANDLE_TARGET_OPCODE(CONVERGENCECTRL_LOOP)
-HANDLE_TARGET_OPCODE(CONVERGENCECTRL_GLUE)
-
 /// The following generic opcodes are not supposed to appear after ISel.
 /// This is something we might want to relax, but for now, this is convenient
 /// to produce diagnostics.

llvm/include/llvm/Support/TargetOpcodes.def

@@ -1483,25 +1483,6 @@ def JUMP_TABLE_DEBUG_INFO : StandardPseudoInstruction {
   let isMeta = true;
 }
 
-let hasSideEffects = false, isMeta = true, isConvergent = true in {
-def CONVERGENCECTRL_ANCHOR : StandardPseudoInstruction {
-  let OutOperandList = (outs unknown:$dst);
-  let InOperandList = (ins);
-}
-def CONVERGENCECTRL_ENTRY : StandardPseudoInstruction {
-  let OutOperandList = (outs unknown:$dst);
-  let InOperandList = (ins);
-}
-def CONVERGENCECTRL_LOOP : StandardPseudoInstruction {
-  let OutOperandList = (outs unknown:$dst);
-  let InOperandList = (ins unknown:$src);
-}
-def CONVERGENCECTRL_GLUE : StandardPseudoInstruction {
-  let OutOperandList = (outs);
-  let InOperandList = (ins unknown:$src);
-}
-}
-
 // Generic opcodes used in GlobalISel.
 include "llvm/Target/GenericOpcodes.td"
 

llvm/include/llvm/Target/Target.td

@@ -782,16 +782,6 @@ def assertsext : SDNode<"ISD::AssertSext", SDT_assert>;
 def assertzext : SDNode<"ISD::AssertZext", SDT_assert>;
 def assertalign : SDNode<"ISD::AssertAlign", SDT_assert>;
 
-def convergencectrl_anchor : SDNode<"ISD::CONVERGENCECTRL_ANCHOR",
-                                    SDTypeProfile<1, 0, [SDTCisVT<0,untyped>]>>;
-def convergencectrl_entry  : SDNode<"ISD::CONVERGENCECTRL_ENTRY",
-                                    SDTypeProfile<1, 0, [SDTCisVT<0,untyped>]>>;
-def convergencectrl_loop   : SDNode<"ISD::CONVERGENCECTRL_LOOP",
-                                    SDTypeProfile<1, 1,
-                                      [SDTCisVT<0,untyped>, SDTCisVT<1,untyped>]>>;
-def convergencectrl_glue   : SDNode<"ISD::CONVERGENCECTRL_GLUE",
-                                    SDTypeProfile<0, 1, [SDTCisVT<0, untyped>]>>;
-
 //===----------------------------------------------------------------------===//
 // Selection DAG Condition Codes
 

llvm/include/llvm/Target/TargetSelectionDAG.td

@@ -109,7 +109,6 @@ add_llvm_component_library(LLVMCodeGen
   MachineBranchProbabilityInfo.cpp
   MachineCFGPrinter.cpp
   MachineCombiner.cpp
-  MachineConvergenceVerifier.cpp
   MachineCopyPropagation.cpp
   MachineCSE.cpp
   MachineCheckDebugify.cpp