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[Test] Pretest for adding llvm.vp.select into canSplatOperand
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llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll

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@@ -5498,3 +5498,87 @@ vector.body: ; preds = %vector.body, %entry
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for.cond.cleanup: ; preds = %vector.body
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ret void
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}
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define void @sink_splat_vp_select_op1(ptr %a, i32 %x, i32 %vl) {
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; CHECK-LABEL: sink_splat_vp_select_op1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
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; CHECK-NEXT: vmv.v.x v8, a1
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; CHECK-NEXT: lui a3, 1
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; CHECK-NEXT: li a1, 42
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; CHECK-NEXT: slli a4, a2, 32
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; CHECK-NEXT: add a2, a0, a3
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; CHECK-NEXT: srli a3, a4, 32
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; CHECK-NEXT: .LBB119_1: # %vector.body
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: vle32.v v9, (a0)
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; CHECK-NEXT: vmseq.vx v0, v9, a1
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; CHECK-NEXT: vsetvli zero, a3, e32, m1, ta, ma
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; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0
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; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
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; CHECK-NEXT: vse32.v v9, (a0)
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; CHECK-NEXT: addi a0, a0, 16
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; CHECK-NEXT: bne a0, a2, .LBB119_1
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; CHECK-NEXT: # %bb.2: # %for.cond.cleanup
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; CHECK-NEXT: ret
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entry:
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%broadcast.splatinsert = insertelement <4 x i32> poison, i32 %x, i32 0
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%broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
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br label %vector.body
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vector.body:
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%index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]
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%0 = getelementptr inbounds i32, ptr %a, i64 %index
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%load = load <4 x i32>, ptr %0, align 4
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%cond = icmp eq <4 x i32> %load, splat (i32 42)
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%1 = call <4 x i32> @llvm.vp.select(<4 x i1> %cond, <4 x i32> %broadcast.splat, <4 x i32> %load, i32 %vl)
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store <4 x i32> %1, ptr %0, align 4
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%index.next = add nuw i64 %index, 4
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%2 = icmp eq i64 %index.next, 1024
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br i1 %2, label %for.cond.cleanup, label %vector.body
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for.cond.cleanup:
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ret void
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}
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define void @sink_splat_vp_select_op2(ptr %a, i32 %x, i32 %vl) {
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; CHECK-LABEL: sink_splat_vp_select_op2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
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; CHECK-NEXT: vmv.v.x v8, a1
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; CHECK-NEXT: lui a3, 1
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; CHECK-NEXT: li a1, 42
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; CHECK-NEXT: slli a4, a2, 32
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; CHECK-NEXT: add a2, a0, a3
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; CHECK-NEXT: srli a3, a4, 32
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; CHECK-NEXT: .LBB120_1: # %vector.body
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: vle32.v v9, (a0)
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; CHECK-NEXT: vmseq.vx v0, v9, a1
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; CHECK-NEXT: vsetvli zero, a3, e32, m1, ta, ma
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; CHECK-NEXT: vmerge.vvm v9, v8, v9, v0
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; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
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; CHECK-NEXT: vse32.v v9, (a0)
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; CHECK-NEXT: addi a0, a0, 16
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; CHECK-NEXT: bne a0, a2, .LBB120_1
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; CHECK-NEXT: # %bb.2: # %for.cond.cleanup
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; CHECK-NEXT: ret
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entry:
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%broadcast.splatinsert = insertelement <4 x i32> poison, i32 %x, i32 0
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%broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
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br label %vector.body
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vector.body:
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%index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]
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%0 = getelementptr inbounds i32, ptr %a, i64 %index
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%load = load <4 x i32>, ptr %0, align 4
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%cond = icmp eq <4 x i32> %load, splat (i32 42)
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%1 = call <4 x i32> @llvm.vp.select(<4 x i1> %cond, <4 x i32> %load, <4 x i32> %broadcast.splat, i32 %vl)
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store <4 x i32> %1, ptr %0, align 4
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%index.next = add nuw i64 %index, 4
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%2 = icmp eq i64 %index.next, 1024
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br i1 %2, label %for.cond.cleanup, label %vector.body
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for.cond.cleanup:
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ret void
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}

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