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[NFC] Remove some unnecessary semicolons
All inside LLVM_DEBUG, some of which have been cleaned up by adding block scopes to allow them to format more nicely.
1 parent b4c1f0c commit a35db28

17 files changed

+83
-79
lines changed

llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -219,12 +219,13 @@ bool GIMatchTableExecutor::executeMatchTable(
219219
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
220220
unsigned Opcode = State.MIs[InsnID]->getOpcode();
221221

222-
DEBUG_WITH_TYPE(TgtExecutor::getName(),
223-
dbgs() << CurrentIdx << ": GIM_CheckOpcode(MIs[" << InsnID
224-
<< "], ExpectedOpcode=" << Expected0;
225-
if (MatcherOpcode == GIM_CheckOpcodeIsEither) dbgs()
226-
<< " || " << Expected1;
227-
dbgs() << ") // Got=" << Opcode << "\n";);
222+
DEBUG_WITH_TYPE(TgtExecutor::getName(), {
223+
dbgs() << CurrentIdx << ": GIM_CheckOpcode(MIs[" << InsnID
224+
<< "], ExpectedOpcode=" << Expected0;
225+
if (MatcherOpcode == GIM_CheckOpcodeIsEither)
226+
dbgs() << " || " << Expected1;
227+
dbgs() << ") // Got=" << Opcode << "\n";
228+
});
228229

229230
if (Opcode != Expected0 && Opcode != Expected1) {
230231
if (handleReject() == RejectAndGiveUp)

llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -70,7 +70,7 @@ class LegalizationArtifactCombiner {
7070
// aext(trunc x) - > aext/copy/trunc x
7171
Register TruncSrc;
7272
if (mi_match(SrcReg, MRI, m_GTrunc(m_Reg(TruncSrc)))) {
73-
LLVM_DEBUG(dbgs() << ".. Combine MI: " << MI;);
73+
LLVM_DEBUG(dbgs() << ".. Combine MI: " << MI);
7474
if (MRI.getType(DstReg) == MRI.getType(TruncSrc))
7575
replaceRegOrBuildCopy(DstReg, TruncSrc, MRI, Builder, UpdatedDefs,
7676
Observer);
@@ -136,7 +136,7 @@ class LegalizationArtifactCombiner {
136136
if (isInstUnsupported({TargetOpcode::G_AND, {DstTy}}) ||
137137
isConstantUnsupported(DstTy))
138138
return false;
139-
LLVM_DEBUG(dbgs() << ".. Combine MI: " << MI;);
139+
LLVM_DEBUG(dbgs() << ".. Combine MI: " << MI);
140140
LLT SrcTy = MRI.getType(SrcReg);
141141
APInt MaskVal = APInt::getAllOnes(SrcTy.getScalarSizeInBits());
142142
if (SextSrc && (DstTy != MRI.getType(SextSrc)))
@@ -207,7 +207,7 @@ class LegalizationArtifactCombiner {
207207
LLT DstTy = MRI.getType(DstReg);
208208
if (isInstUnsupported({TargetOpcode::G_SEXT_INREG, {DstTy}}))
209209
return false;
210-
LLVM_DEBUG(dbgs() << ".. Combine MI: " << MI;);
210+
LLVM_DEBUG(dbgs() << ".. Combine MI: " << MI);
211211
LLT SrcTy = MRI.getType(SrcReg);
212212
uint64_t SizeInBits = SrcTy.getScalarSizeInBits();
213213
if (DstTy != MRI.getType(TruncSrc))
@@ -360,7 +360,7 @@ class LegalizationArtifactCombiner {
360360
LLT FoundRegTy = MRI.getType(FoundReg);
361361
if (DstTy == FoundRegTy) {
362362
LLVM_DEBUG(dbgs() << ".. Combine G_TRUNC(G_[S,Z,ANY]EXT/G_TRUNC...): "
363-
<< MI;);
363+
<< MI);
364364

365365
replaceRegOrBuildCopy(DstReg, FoundReg, MRI, Builder, UpdatedDefs,
366366
Observer);
@@ -392,7 +392,7 @@ class LegalizationArtifactCombiner {
392392
// G_ANYEXT (G_IMPLICIT_DEF) -> G_IMPLICIT_DEF
393393
if (!isInstLegal({TargetOpcode::G_IMPLICIT_DEF, {DstTy}}))
394394
return false;
395-
LLVM_DEBUG(dbgs() << ".. Combine G_ANYEXT(G_IMPLICIT_DEF): " << MI;);
395+
LLVM_DEBUG(dbgs() << ".. Combine G_ANYEXT(G_IMPLICIT_DEF): " << MI);
396396
auto Impl = Builder.buildUndef(DstTy);
397397
replaceRegOrBuildCopy(DstReg, Impl.getReg(0), MRI, Builder, UpdatedDefs,
398398
Observer);
@@ -402,7 +402,7 @@ class LegalizationArtifactCombiner {
402402
// bits will be 0 for G_ZEXT and 0/1 for the G_SEXT.
403403
if (isConstantUnsupported(DstTy))
404404
return false;
405-
LLVM_DEBUG(dbgs() << ".. Combine G_[SZ]EXT(G_IMPLICIT_DEF): " << MI;);
405+
LLVM_DEBUG(dbgs() << ".. Combine G_[SZ]EXT(G_IMPLICIT_DEF): " << MI);
406406
auto Cnst = Builder.buildConstant(DstTy, 0);
407407
replaceRegOrBuildCopy(DstReg, Cnst.getReg(0), MRI, Builder, UpdatedDefs,
408408
Observer);

llvm/lib/CodeGen/BranchFolding.cpp

Lines changed: 15 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -891,19 +891,21 @@ bool BranchFolder::TryTailMergeBlocks(MachineBasicBlock *SuccBB,
891891
unsigned MinCommonTailLength) {
892892
bool MadeChange = false;
893893

894-
LLVM_DEBUG(
895-
dbgs() << "\nTryTailMergeBlocks: ";
896-
for (unsigned i = 0, e = MergePotentials.size(); i != e; ++i) dbgs()
897-
<< printMBBReference(*MergePotentials[i].getBlock())
898-
<< (i == e - 1 ? "" : ", ");
899-
dbgs() << "\n"; if (SuccBB) {
900-
dbgs() << " with successor " << printMBBReference(*SuccBB) << '\n';
901-
if (PredBB)
902-
dbgs() << " which has fall-through from "
903-
<< printMBBReference(*PredBB) << "\n";
904-
} dbgs() << "Looking for common tails of at least "
905-
<< MinCommonTailLength << " instruction"
906-
<< (MinCommonTailLength == 1 ? "" : "s") << '\n';);
894+
LLVM_DEBUG({
895+
dbgs() << "\nTryTailMergeBlocks: ";
896+
for (unsigned i = 0, e = MergePotentials.size(); i != e; ++i)
897+
dbgs() << printMBBReference(*MergePotentials[i].getBlock())
898+
<< (i == e - 1 ? "" : ", ");
899+
dbgs() << "\n";
900+
if (SuccBB) {
901+
dbgs() << " with successor " << printMBBReference(*SuccBB) << '\n';
902+
if (PredBB)
903+
dbgs() << " which has fall-through from " << printMBBReference(*PredBB)
904+
<< "\n";
905+
}
906+
dbgs() << "Looking for common tails of at least " << MinCommonTailLength
907+
<< " instruction" << (MinCommonTailLength == 1 ? "" : "s") << '\n';
908+
});
907909

908910
// Sort by hash value so that blocks with identical end sequences sort
909911
// together.

llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -163,7 +163,7 @@ MachineInstr *GISelCSEInfo::getMachineInstrIfExists(FoldingSetNodeID &ID,
163163
void *&InsertPos) {
164164
handleRecordedInsts();
165165
if (auto *Inst = getNodeIfExists(ID, MBB, InsertPos)) {
166-
LLVM_DEBUG(dbgs() << "CSEInfo::Found Instr " << *Inst->MI;);
166+
LLVM_DEBUG(dbgs() << "CSEInfo::Found Instr " << *Inst->MI);
167167
return const_cast<MachineInstr *>(Inst->MI);
168168
}
169169
return nullptr;
@@ -313,11 +313,11 @@ Error GISelCSEInfo::verify() {
313313
}
314314

315315
void GISelCSEInfo::print() {
316-
LLVM_DEBUG(for (auto &It
317-
: OpcodeHitTable) {
318-
dbgs() << "CSEInfo::CSE Hit for Opc " << It.first << " : " << It.second
319-
<< "\n";
320-
};);
316+
LLVM_DEBUG({
317+
for (auto &It : OpcodeHitTable)
318+
dbgs() << "CSEInfo::CSE Hit for Opc " << It.first << " : " << It.second
319+
<< "\n";
320+
});
321321
}
322322
/// -----------------------------------------
323323
// ---- Profiling methods for FoldingSetNode --- //

llvm/lib/CodeGen/MIRCanonicalizerPass.cpp

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -271,15 +271,14 @@ static bool rescheduleCanonically(unsigned &PseudoIdempotentInstCount,
271271
continue;
272272

273273
LLVM_DEBUG(
274-
dbgs() << "Rescheduling Multi-Use Instructions Lexographically.";);
274+
dbgs() << "Rescheduling Multi-Use Instructions Lexographically.");
275275
Changed |= rescheduleLexographically(
276276
MultiUsers[E.second], MBB,
277277
[&]() -> MachineBasicBlock::iterator { return UseI; });
278278
}
279279

280280
PseudoIdempotentInstCount = PseudoIdempotentInstructions.size();
281-
LLVM_DEBUG(
282-
dbgs() << "Rescheduling Idempotent Instructions Lexographically.";);
281+
LLVM_DEBUG(dbgs() << "Rescheduling Idempotent Instructions Lexographically.");
283282
Changed |= rescheduleLexographically(
284283
PseudoIdempotentInstructions, MBB,
285284
[&]() -> MachineBasicBlock::iterator { return MBB->begin(); });
@@ -365,7 +364,7 @@ static bool runOnBasicBlock(MachineBasicBlock *MBB,
365364

366365
bool Changed = false;
367366

368-
LLVM_DEBUG(dbgs() << "\n\n NEW BASIC BLOCK: " << MBB->getName() << "\n\n";);
367+
LLVM_DEBUG(dbgs() << "\n\n NEW BASIC BLOCK: " << MBB->getName() << "\n\n");
369368

370369
LLVM_DEBUG(dbgs() << "MBB Before Canonical Copy Propagation:\n";
371370
MBB->dump(););
@@ -384,7 +383,7 @@ static bool runOnBasicBlock(MachineBasicBlock *MBB,
384383
Changed |= doDefKillClear(MBB);
385384

386385
LLVM_DEBUG(dbgs() << "Updated MachineBasicBlock:\n"; MBB->dump();
387-
dbgs() << "\n";);
386+
dbgs() << "\n");
388387
LLVM_DEBUG(
389388
dbgs() << "\n\n================================================\n\n");
390389
return Changed;

llvm/lib/CodeGen/MachineCombiner.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -399,7 +399,7 @@ bool MachineCombiner::improvesCriticalPathLen(
399399
<< RootSlack << " SlackIsAccurate=" << SlackIsAccurate
400400
<< "\n\tNewRootDepth + NewRootLatency = " << NewCycleCount
401401
<< "\n\tRootDepth + RootLatency + RootSlack = "
402-
<< OldCycleCount;);
402+
<< OldCycleCount);
403403
LLVM_DEBUG(NewCycleCount <= OldCycleCount
404404
? dbgs() << "\n\t It IMPROVES PathLen because"
405405
: dbgs() << "\n\t It DOES NOT improve PathLen because");
@@ -452,7 +452,7 @@ bool MachineCombiner::preservesResourceLen(
452452

453453
LLVM_DEBUG(dbgs() << "\t\tResource length before replacement: "
454454
<< ResLenBeforeCombine
455-
<< " and after: " << ResLenAfterCombine << "\n";);
455+
<< " and after: " << ResLenAfterCombine << "\n");
456456
LLVM_DEBUG(
457457
ResLenAfterCombine <=
458458
ResLenBeforeCombine + TII->getExtendResourceLenLimit()

llvm/lib/CodeGen/MachineLateInstrsCleanup.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -189,7 +189,7 @@ bool MachineLateInstrsCleanup::processBlock(MachineBasicBlock *MBB) {
189189
})) {
190190
MBBDefs[Reg] = DefMI;
191191
LLVM_DEBUG(dbgs() << "Reusable instruction from pred(s): in "
192-
<< printMBBReference(*MBB) << ": " << *DefMI;);
192+
<< printMBBReference(*MBB) << ": " << *DefMI);
193193
}
194194
}
195195

@@ -212,7 +212,7 @@ bool MachineLateInstrsCleanup::processBlock(MachineBasicBlock *MBB) {
212212
// Check for an earlier identical and reusable instruction.
213213
if (IsCandidate && MBBDefs.hasIdentical(DefedReg, &MI)) {
214214
LLVM_DEBUG(dbgs() << "Removing redundant instruction in "
215-
<< printMBBReference(*MBB) << ": " << MI;);
215+
<< printMBBReference(*MBB) << ": " << MI);
216216
removeRedundantDef(&MI);
217217
Changed = true;
218218
continue;
@@ -232,7 +232,7 @@ bool MachineLateInstrsCleanup::processBlock(MachineBasicBlock *MBB) {
232232
// Record this MI for potential later reuse.
233233
if (IsCandidate) {
234234
LLVM_DEBUG(dbgs() << "Found interesting instruction in "
235-
<< printMBBReference(*MBB) << ": " << MI;);
235+
<< printMBBReference(*MBB) << ": " << MI);
236236
MBBDefs[DefedReg] = &MI;
237237
assert(!MBBKills.count(DefedReg) && "Should already have been removed.");
238238
}

llvm/lib/CodeGen/MachineOutliner.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1182,7 +1182,7 @@ bool MachineOutliner::outline(
11821182
}
11831183
}
11841184

1185-
LLVM_DEBUG(dbgs() << "OutlinedSomething = " << OutlinedSomething << "\n";);
1185+
LLVM_DEBUG(dbgs() << "OutlinedSomething = " << OutlinedSomething << "\n");
11861186
return OutlinedSomething;
11871187
}
11881188

llvm/lib/CodeGen/MachinePipeliner.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -3336,15 +3336,15 @@ void SwingSchedulerDAG::checkValidNodeOrder(const NodeSetType &Circuits) const {
33363336
bool InCircuit = llvm::any_of(
33373337
Circuits, [SU](const NodeSet &Circuit) { return Circuit.count(SU); });
33383338
if (InCircuit)
3339-
LLVM_DEBUG(dbgs() << "In a circuit, predecessor ";);
3339+
LLVM_DEBUG(dbgs() << "In a circuit, predecessor ");
33403340
else {
33413341
Valid = false;
33423342
NumNodeOrderIssues++;
3343-
LLVM_DEBUG(dbgs() << "Predecessor ";);
3343+
LLVM_DEBUG(dbgs() << "Predecessor ");
33443344
}
33453345
LLVM_DEBUG(dbgs() << Pred->NodeNum << " and successor " << Succ->NodeNum
33463346
<< " are scheduled before node " << SU->NodeNum
3347-
<< "\n";);
3347+
<< "\n");
33483348
}
33493349
}
33503350

@@ -3573,7 +3573,7 @@ bool ResourceManager::canReserveResources(SUnit &SU, int Cycle) {
35733573
bool Result = !isOverbooked();
35743574
unreserveResources(SCDesc, Cycle);
35753575

3576-
LLVM_DEBUG(if (SwpDebugResource) dbgs() << "return " << Result << "\n\n";);
3576+
LLVM_DEBUG(if (SwpDebugResource) dbgs() << "return " << Result << "\n\n");
35773577
return Result;
35783578
}
35793579

llvm/lib/CodeGen/ModuloSchedule.cpp

Lines changed: 5 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -2693,8 +2693,7 @@ void ModuloScheduleExpanderMVE::expand() {
26932693
/// Check if ModuloScheduleExpanderMVE can be applied to L
26942694
bool ModuloScheduleExpanderMVE::canApply(MachineLoop &L) {
26952695
if (!L.getExitBlock()) {
2696-
LLVM_DEBUG(
2697-
dbgs() << "Can not apply MVE expander: No single exit block.\n";);
2696+
LLVM_DEBUG(dbgs() << "Can not apply MVE expander: No single exit block.\n");
26982697
return false;
26992698
}
27002699

@@ -2711,9 +2710,8 @@ bool ModuloScheduleExpanderMVE::canApply(MachineLoop &L) {
27112710
if (MO.isReg())
27122711
for (MachineInstr &Ref : MRI.use_instructions(MO.getReg()))
27132712
if (Ref.getParent() != BB || Ref.isPHI()) {
2714-
LLVM_DEBUG(dbgs()
2715-
<< "Can not apply MVE expander: A phi result is "
2716-
"referenced outside of the loop or by phi.\n";);
2713+
LLVM_DEBUG(dbgs() << "Can not apply MVE expander: A phi result is "
2714+
"referenced outside of the loop or by phi.\n");
27172715
return false;
27182716
}
27192717

@@ -2726,12 +2724,12 @@ bool ModuloScheduleExpanderMVE::canApply(MachineLoop &L) {
27262724
MRI.getVRegDef(LoopVal)->getParent() != BB) {
27272725
LLVM_DEBUG(
27282726
dbgs() << "Can not apply MVE expander: A phi source value coming "
2729-
"from the loop is not defined in the loop.\n";);
2727+
"from the loop is not defined in the loop.\n");
27302728
return false;
27312729
}
27322730
if (UsedByPhi.count(LoopVal)) {
27332731
LLVM_DEBUG(dbgs() << "Can not apply MVE expander: A value defined in the "
2734-
"loop is referenced by two or more phis.\n";);
2732+
"loop is referenced by two or more phis.\n");
27352733
return false;
27362734
}
27372735
UsedByPhi.insert(LoopVal);

llvm/lib/CodeGen/ScheduleDAGInstrs.cpp

Lines changed: 6 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -908,7 +908,7 @@ void ScheduleDAGInstrs::buildSchedGraph(AAResults *AA,
908908
BarrierChain = SU;
909909

910910
LLVM_DEBUG(dbgs() << "Global memory object and new barrier chain: SU("
911-
<< BarrierChain->NodeNum << ").\n";);
911+
<< BarrierChain->NodeNum << ").\n");
912912

913913
// Add dependencies against everything below it and clear maps.
914914
addBarrierChain(Stores);
@@ -929,7 +929,7 @@ void ScheduleDAGInstrs::buildSchedGraph(AAResults *AA,
929929
FPExceptions.insert(SU, UnknownValue);
930930

931931
if (FPExceptions.size() >= HugeRegion) {
932-
LLVM_DEBUG(dbgs() << "Reducing FPExceptions map.\n";);
932+
LLVM_DEBUG(dbgs() << "Reducing FPExceptions map.\n");
933933
Value2SUsMap empty;
934934
reduceHugeMemNodeMaps(FPExceptions, empty, getReductionSize());
935935
}
@@ -1012,12 +1012,11 @@ void ScheduleDAGInstrs::buildSchedGraph(AAResults *AA,
10121012

10131013
// Reduce maps if they grow huge.
10141014
if (Stores.size() + Loads.size() >= HugeRegion) {
1015-
LLVM_DEBUG(dbgs() << "Reducing Stores and Loads maps.\n";);
1015+
LLVM_DEBUG(dbgs() << "Reducing Stores and Loads maps.\n");
10161016
reduceHugeMemNodeMaps(Stores, Loads, getReductionSize());
10171017
}
10181018
if (NonAliasStores.size() + NonAliasLoads.size() >= HugeRegion) {
1019-
LLVM_DEBUG(
1020-
dbgs() << "Reducing NonAliasStores and NonAliasLoads maps.\n";);
1019+
LLVM_DEBUG(dbgs() << "Reducing NonAliasStores and NonAliasLoads maps.\n");
10211020
reduceHugeMemNodeMaps(NonAliasStores, NonAliasLoads, getReductionSize());
10221021
}
10231022
}
@@ -1090,11 +1089,11 @@ void ScheduleDAGInstrs::reduceHugeMemNodeMaps(Value2SUsMap &stores,
10901089
BarrierChain->addPredBarrier(newBarrierChain);
10911090
BarrierChain = newBarrierChain;
10921091
LLVM_DEBUG(dbgs() << "Inserting new barrier chain: SU("
1093-
<< BarrierChain->NodeNum << ").\n";);
1092+
<< BarrierChain->NodeNum << ").\n");
10941093
}
10951094
else
10961095
LLVM_DEBUG(dbgs() << "Keeping old barrier chain: SU("
1097-
<< BarrierChain->NodeNum << ").\n";);
1096+
<< BarrierChain->NodeNum << ").\n");
10981097
}
10991098
else
11001099
BarrierChain = newBarrierChain;

llvm/lib/CodeGen/SelectionDAG/FastISel.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1229,7 +1229,7 @@ void FastISel::handleDbgInfo(const Instruction *II) {
12291229
}
12301230

12311231
if (!Res)
1232-
LLVM_DEBUG(dbgs() << "Dropping debug-info for " << DVR << "\n";);
1232+
LLVM_DEBUG(dbgs() << "Dropping debug-info for " << DVR << "\n");
12331233
}
12341234
}
12351235

llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -4269,11 +4269,12 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
42694269
CurDAG->setNodeMemRefs(Res, FilteredMemRefs);
42704270
}
42714271

4272-
LLVM_DEBUG(if (!MatchedMemRefs.empty() && Res->memoperands_empty()) dbgs()
4273-
<< " Dropping mem operands\n";
4274-
dbgs() << " " << (IsMorphNodeTo ? "Morphed" : "Created")
4275-
<< " node: ";
4276-
Res->dump(CurDAG););
4272+
LLVM_DEBUG({
4273+
if (!MatchedMemRefs.empty() && Res->memoperands_empty())
4274+
dbgs() << " Dropping mem operands\n";
4275+
dbgs() << " " << (IsMorphNodeTo ? "Morphed" : "Created") << " node: ";
4276+
Res->dump(CurDAG);
4277+
});
42774278

42784279
// If this was a MorphNodeTo then we're completely done!
42794280
if (IsMorphNodeTo) {

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 8 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -12809,9 +12809,10 @@ SDValue AArch64TargetLowering::ReconstructShuffle(SDValue Op,
1280912809
}
1281012810

1281112811
// Final check before we try to actually produce a shuffle.
12812-
LLVM_DEBUG(for (auto Src
12813-
: Sources)
12814-
assert(Src.ShuffleVec.getValueType() == ShuffleVT););
12812+
LLVM_DEBUG({
12813+
for (auto Src : Sources)
12814+
assert(Src.ShuffleVec.getValueType() == ShuffleVT);
12815+
});
1281512816

1281612817
// The stars all align, our next step is to produce the mask for the shuffle.
1281712818
SmallVector<int, 8> Mask(ShuffleVT.getVectorNumElements(), -1);
@@ -15065,8 +15066,10 @@ SDValue AArch64TargetLowering::LowerBUILD_VECTOR(SDValue Op,
1506515066
Vec = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Op0);
1506615067
++i;
1506715068
}
15068-
LLVM_DEBUG(if (i < NumElts) dbgs()
15069-
<< "Creating nodes for the other vector elements:\n";);
15069+
LLVM_DEBUG({
15070+
if (i < NumElts)
15071+
dbgs() << "Creating nodes for the other vector elements:\n";
15072+
});
1507015073
for (; i < NumElts; ++i) {
1507115074
SDValue V = Op.getOperand(i);
1507215075
if (V.isUndef())

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