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mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -902,7 +902,7 @@ struct LowerIllegalTransposeStoreViaZA
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rewriter.create<arith::AddIOp>(loc, transposedCol, writeIndices[1]);
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auto smeWrite = rewriter.create<vector::TransferWriteOp>(
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loc, tile, destTensorOrMemref, ValueRange{destRow, destCol},
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transposeMap, subMask, writeOp.getInBounds().value_or(ArrayAttr{}));
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transposeMap, subMask, writeOp.getInBounds());
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if (writeOp.hasPureTensorSemantics())
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destTensorOrMemref = smeWrite.getResult();

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