@@ -49956,6 +49956,7 @@ static SDValue combineLoad(SDNode *N, SelectionDAG &DAG,
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};
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// See if we are loading a constant that matches in the lower
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// bits of a longer constant (but from a different constant pool ptr).
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+ EVT UserVT = User->getValueType(0);
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SDValue UserPtr = cast<MemSDNode>(User)->getBasePtr();
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const Constant *LdC = getTargetConstantFromBasePtr(Ptr);
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const Constant *UserC = getTargetConstantFromBasePtr(UserPtr);
@@ -49965,9 +49966,12 @@ static SDValue combineLoad(SDNode *N, SelectionDAG &DAG,
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if (LdSize < UserSize || !ISD::isNormalLoad(User)) {
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APInt Undefs, UserUndefs;
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SmallVector<APInt> Bits, UserBits;
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- if (getTargetConstantBitsFromNode(SDValue(N, 0), 8, Undefs, Bits) &&
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- getTargetConstantBitsFromNode(SDValue(User, 0), 8, UserUndefs,
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- UserBits)) {
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+ unsigned NumBits = std::min(RegVT.getScalarSizeInBits(),
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+ UserVT.getScalarSizeInBits());
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+ if (getTargetConstantBitsFromNode(SDValue(N, 0), NumBits, Undefs,
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+ Bits) &&
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+ getTargetConstantBitsFromNode(SDValue(User, 0), NumBits,
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+ UserUndefs, UserBits)) {
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if (MatchingBits(Undefs, UserUndefs, Bits, UserBits)) {
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SDValue Extract = extractSubVector(
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SDValue(User, 0), 0, DAG, SDLoc(N), RegVT.getSizeInBits());
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