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[InstCombine] Add pre-commit tests from PR76128. NFC.
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  • llvm/test/Transforms/InstCombine

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‎llvm/test/Transforms/InstCombine/add4.ll

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@@ -1,6 +1,8 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=instcombine -S | FileCheck %s
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declare void @use(i32)
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define i64 @match_unsigned(i64 %x) {
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; CHECK-LABEL: @match_unsigned(
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; CHECK-NEXT: [[UREM:%.*]] = urem i64 [[X:%.*]], 19136
@@ -127,3 +129,174 @@ define i32 @not_match_overflow(i32 %x) {
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%t4 = add i32 %t, %t3
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ret i32 %t4
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}
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; Tests from PR76128.
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define i32 @fold_add_udiv_urem(i32 noundef %val) {
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; CHECK-LABEL: @fold_add_udiv_urem(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[VAL:%.*]], 10
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; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[DIV]], 4
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; CHECK-NEXT: [[REM:%.*]] = urem i32 [[VAL]], 10
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; CHECK-NEXT: [[ADD:%.*]] = or disjoint i32 [[SHL]], [[REM]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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entry:
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%div = udiv i32 %val, 10
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%shl = shl i32 %div, 4
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%rem = urem i32 %val, 10
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%add = add i32 %shl, %rem
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ret i32 %add
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}
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define i32 @fold_add_sdiv_srem(i32 noundef %val) {
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; CHECK-LABEL: @fold_add_sdiv_srem(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[VAL:%.*]], 10
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; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[DIV]], 4
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; CHECK-NEXT: [[REM:%.*]] = srem i32 [[VAL]], 10
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[SHL]], [[REM]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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entry:
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%div = sdiv i32 %val, 10
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%shl = shl i32 %div, 4
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%rem = srem i32 %val, 10
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%add = add i32 %shl, %rem
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ret i32 %add
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}
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define i32 @fold_add_udiv_urem_to_mul(i32 noundef %val) {
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; CHECK-LABEL: @fold_add_udiv_urem_to_mul(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[VAL:%.*]], 7
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; CHECK-NEXT: [[MUL1:%.*]] = mul i32 [[DIV]], 21
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; CHECK-NEXT: [[REM:%.*]] = urem i32 [[VAL]], 7
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; CHECK-NEXT: [[MUL2:%.*]] = mul nuw nsw i32 [[REM]], 3
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[MUL1]], [[MUL2]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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entry:
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%div = udiv i32 %val, 7
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%mul1 = mul i32 %div, 21
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%rem = urem i32 %val, 7
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%mul2 = mul i32 %rem, 3
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%add = add i32 %mul1, %mul2
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ret i32 %add
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}
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define i32 @fold_add_udiv_urem_to_mul_multiuse(i32 noundef %val) {
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; CHECK-LABEL: @fold_add_udiv_urem_to_mul_multiuse(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[VAL:%.*]], 7
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; CHECK-NEXT: [[MUL1:%.*]] = mul i32 [[DIV]], 21
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; CHECK-NEXT: [[REM:%.*]] = urem i32 [[VAL]], 7
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; CHECK-NEXT: call void @use(i32 [[REM]])
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; CHECK-NEXT: [[MUL2:%.*]] = mul nuw nsw i32 [[REM]], 3
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[MUL1]], [[MUL2]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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entry:
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%div = udiv i32 %val, 7
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%mul1 = mul i32 %div, 21
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%rem = urem i32 %val, 7
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call void @use(i32 %rem)
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%mul2 = mul i32 %rem, 3
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%add = add i32 %mul1, %mul2
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ret i32 %add
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}
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define i32 @fold_add_udiv_urem_commuted(i32 noundef %val) {
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; CHECK-LABEL: @fold_add_udiv_urem_commuted(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[VAL:%.*]], 10
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; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[DIV]], 4
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; CHECK-NEXT: [[REM:%.*]] = urem i32 [[VAL]], 10
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; CHECK-NEXT: [[ADD:%.*]] = or disjoint i32 [[REM]], [[SHL]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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entry:
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%div = udiv i32 %val, 10
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%shl = shl i32 %div, 4
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%rem = urem i32 %val, 10
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%add = add i32 %rem, %shl
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ret i32 %add
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}
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define i32 @fold_add_udiv_urem_or_disjoint(i32 noundef %val) {
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; CHECK-LABEL: @fold_add_udiv_urem_or_disjoint(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[VAL:%.*]], 10
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; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[DIV]], 4
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; CHECK-NEXT: [[REM:%.*]] = urem i32 [[VAL]], 10
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; CHECK-NEXT: [[ADD:%.*]] = or disjoint i32 [[SHL]], [[REM]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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entry:
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%div = udiv i32 %val, 10
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%shl = shl i32 %div, 4
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%rem = urem i32 %val, 10
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%add = or disjoint i32 %shl, %rem
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ret i32 %add
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}
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; Negative tests
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define i32 @fold_add_udiv_urem_without_noundef(i32 %val) {
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; CHECK-LABEL: @fold_add_udiv_urem_without_noundef(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[VAL:%.*]], 10
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; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[DIV]], 4
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; CHECK-NEXT: [[REM:%.*]] = urem i32 [[VAL]], 10
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; CHECK-NEXT: [[ADD:%.*]] = or disjoint i32 [[SHL]], [[REM]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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entry:
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%div = udiv i32 %val, 10
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%shl = shl i32 %div, 4
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%rem = urem i32 %val, 10
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%add = add i32 %shl, %rem
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ret i32 %add
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}
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define i32 @fold_add_udiv_urem_multiuse_mul(i32 noundef %val) {
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; CHECK-LABEL: @fold_add_udiv_urem_multiuse_mul(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[VAL:%.*]], 10
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; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[DIV]], 4
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; CHECK-NEXT: call void @use(i32 [[SHL]])
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; CHECK-NEXT: [[REM:%.*]] = urem i32 [[VAL]], 10
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; CHECK-NEXT: [[ADD:%.*]] = or disjoint i32 [[SHL]], [[REM]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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entry:
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%div = udiv i32 %val, 10
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%shl = shl i32 %div, 4
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call void @use(i32 %shl)
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%rem = urem i32 %val, 10
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%add = add i32 %shl, %rem
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ret i32 %add
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}
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define i32 @fold_add_udiv_srem(i32 noundef %val) {
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; CHECK-LABEL: @fold_add_udiv_srem(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[VAL:%.*]], 10
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; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[DIV]], 4
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; CHECK-NEXT: [[REM:%.*]] = srem i32 [[VAL]], 10
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[SHL]], [[REM]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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entry:
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%div = udiv i32 %val, 10
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%shl = shl i32 %div, 4
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%rem = srem i32 %val, 10
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%add = add i32 %shl, %rem
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ret i32 %add
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}
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define i32 @fold_add_udiv_urem_non_constant(i32 noundef %val, i32 noundef %c) {
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; CHECK-LABEL: @fold_add_udiv_urem_non_constant(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[VAL:%.*]], [[C:%.*]]
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; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[DIV]], 4
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; CHECK-NEXT: [[REM:%.*]] = urem i32 [[VAL]], [[C]]
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[SHL]], [[REM]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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entry:
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%div = udiv i32 %val, %c
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%shl = shl i32 %div, 4
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%rem = urem i32 %val, %c
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%add = add i32 %shl, %rem
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ret i32 %add
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}

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