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[CodeGen] Use MachineInstr::{all_uses,all_defs} (NFC) (#106404)
1 parent ef403f9 commit a4989cd

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3 files changed

+9
-19
lines changed

3 files changed

+9
-19
lines changed

llvm/lib/CodeGen/MachineConvergenceVerifier.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -51,9 +51,7 @@ GenericConvergenceVerifier<MachineSSAContext>::findAndCheckConvergenceTokenUsed(
5151
const MachineRegisterInfo &MRI = Context.getFunction()->getRegInfo();
5252
const MachineInstr *TokenDef = nullptr;
5353

54-
for (const MachineOperand &MO : MI.operands()) {
55-
if (!MO.isReg() || !MO.isUse())
56-
continue;
54+
for (const MachineOperand &MO : MI.all_uses()) {
5755
Register OpReg = MO.getReg();
5856
if (!OpReg.isVirtual())
5957
continue;

llvm/lib/CodeGen/MachineInstr.cpp

Lines changed: 7 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1041,10 +1041,9 @@ unsigned MachineInstr::getBundleSize() const {
10411041
/// Returns true if the MachineInstr has an implicit-use operand of exactly
10421042
/// the given register (not considering sub/super-registers).
10431043
bool MachineInstr::hasRegisterImplicitUseOperand(Register Reg) const {
1044-
for (const MachineOperand &MO : operands()) {
1045-
if (MO.isReg() && MO.isUse() && MO.isImplicit() && MO.getReg() == Reg)
1044+
for (const MachineOperand &MO : all_uses())
1045+
if (MO.isImplicit() && MO.getReg() == Reg)
10461046
return true;
1047-
}
10481047
return false;
10491048
}
10501049

@@ -1264,10 +1263,8 @@ unsigned MachineInstr::findTiedOperandIdx(unsigned OpIdx) const {
12641263
/// clearKillInfo - Clears kill flags on all operands.
12651264
///
12661265
void MachineInstr::clearKillInfo() {
1267-
for (MachineOperand &MO : operands()) {
1268-
if (MO.isReg() && MO.isUse())
1269-
MO.setIsKill(false);
1270-
}
1266+
for (MachineOperand &MO : all_uses())
1267+
MO.setIsKill(false);
12711268
}
12721269

12731270
void MachineInstr::substituteRegister(Register FromReg, Register ToReg,
@@ -1549,12 +1546,9 @@ bool MachineInstr::isLoadFoldBarrier() const {
15491546
/// allDefsAreDead - Return true if all the defs of this instruction are dead.
15501547
///
15511548
bool MachineInstr::allDefsAreDead() const {
1552-
for (const MachineOperand &MO : operands()) {
1553-
if (!MO.isReg() || MO.isUse())
1554-
continue;
1549+
for (const MachineOperand &MO : all_defs())
15551550
if (!MO.isDead())
15561551
return false;
1557-
}
15581552
return true;
15591553
}
15601554

@@ -2063,8 +2057,8 @@ void MachineInstr::clearRegisterKills(Register Reg,
20632057
const TargetRegisterInfo *RegInfo) {
20642058
if (!Reg.isPhysical())
20652059
RegInfo = nullptr;
2066-
for (MachineOperand &MO : operands()) {
2067-
if (!MO.isReg() || !MO.isUse() || !MO.isKill())
2060+
for (MachineOperand &MO : all_uses()) {
2061+
if (!MO.isKill())
20682062
continue;
20692063
Register OpReg = MO.getReg();
20702064
if ((RegInfo && RegInfo->regsOverlap(Reg, OpReg)) || Reg == OpReg)

llvm/lib/CodeGen/RegAllocFast.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1563,9 +1563,7 @@ void RegAllocFastImpl::allocateInstruction(MachineInstr &MI) {
15631563
bool ReArrangedImplicitMOs = true;
15641564
while (ReArrangedImplicitMOs) {
15651565
ReArrangedImplicitMOs = false;
1566-
for (MachineOperand &MO : MI.operands()) {
1567-
if (!MO.isReg() || !MO.isUse())
1568-
continue;
1566+
for (MachineOperand &MO : MI.all_uses()) {
15691567
Register Reg = MO.getReg();
15701568
if (!Reg.isVirtual() || !shouldAllocateRegister(Reg))
15711569
continue;

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