We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent f23ac04 commit a5b8a27Copy full SHA for a5b8a27
mlir/include/mlir/Conversion/Passes.td
@@ -650,9 +650,9 @@ def ConvertGPUToSPIRV : Pass<"convert-gpu-to-spirv", "ModuleOp"> {
650
def ConvertGPUToAMDGPUPass : Pass<"convert-gpu-to-amdgpu"> {
651
let summary = "Generate AMDGPU operations for gpu operations";
652
let dependentDialects = [
653
- "LLVM::LLVMDialect",
654
- "::mlir::gpu::GPUDialect",
655
"amdgpu::AMDGPUDialect",
+ "LLVM::LLVMDialect",
+ "ROCDL::ROCDLDialect",
656
];
657
let options = [Option<"subgroupSize", "subgroup-size", "unsigned",
658
/*default=*/"64",
0 commit comments