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[RISCV] Add test coverage for DAG store merging of floating point values
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‎llvm/test/CodeGen/RISCV/stores-of-loads-merging.ll

Lines changed: 167 additions & 1 deletion
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@@ -1,5 +1,6 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=riscv64 -mattr=+v | FileCheck %s
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; RUN: llc < %s -mtriple=riscv64 -mattr=+v | FileCheck %s --check-prefixes=CHECK,V
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; RUN: llc < %s -mtriple=riscv64 -mattr=+v,+zvfh | FileCheck %s --check-prefixes=CHECK,ZVFH
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declare i32 @llvm.experimental.constrained.fptosi.i32.f64(double, metadata)
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declare void @g()
@@ -327,3 +328,168 @@ define void @v16i8_v32i8(ptr %p, ptr %q) {
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store <16 x i8> %x1, ptr %q1
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ret void
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}
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; TODO: We fail to merge these, which would be profitable.
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define void @two_half(ptr %p, ptr %q) {
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; V-LABEL: two_half:
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; V: # %bb.0:
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; V-NEXT: addi sp, sp, -32
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; V-NEXT: .cfi_def_cfa_offset 32
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; V-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
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; V-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; V-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
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; V-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
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; V-NEXT: .cfi_offset ra, -8
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; V-NEXT: .cfi_offset s0, -16
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; V-NEXT: .cfi_offset s1, -24
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; V-NEXT: .cfi_offset s2, -32
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; V-NEXT: lh s1, 0(a0)
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; V-NEXT: lh s2, 2(a0)
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; V-NEXT: mv s0, a1
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; V-NEXT: call g
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; V-NEXT: sh s1, 0(s0)
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; V-NEXT: sh s2, 2(s0)
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; V-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
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; V-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
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; V-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
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; V-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
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; V-NEXT: .cfi_restore ra
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; V-NEXT: .cfi_restore s0
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; V-NEXT: .cfi_restore s1
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; V-NEXT: .cfi_restore s2
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; V-NEXT: addi sp, sp, 32
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; V-NEXT: .cfi_def_cfa_offset 0
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; V-NEXT: ret
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;
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; ZVFH-LABEL: two_half:
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; ZVFH: # %bb.0:
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; ZVFH-NEXT: addi sp, sp, -32
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; ZVFH-NEXT: .cfi_def_cfa_offset 32
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; ZVFH-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
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; ZVFH-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; ZVFH-NEXT: .cfi_offset ra, -8
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; ZVFH-NEXT: .cfi_offset s0, -16
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; ZVFH-NEXT: csrr a2, vlenb
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; ZVFH-NEXT: sub sp, sp, a2
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; ZVFH-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x20, 0x22, 0x11, 0x01, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 32 + 1 * vlenb
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; ZVFH-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
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; ZVFH-NEXT: vle16.v v8, (a0)
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; ZVFH-NEXT: addi a0, sp, 16
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; ZVFH-NEXT: vs1r.v v8, (a0) # Unknown-size Folded Spill
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; ZVFH-NEXT: mv s0, a1
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; ZVFH-NEXT: call g
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; ZVFH-NEXT: addi a0, sp, 16
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; ZVFH-NEXT: vl1r.v v8, (a0) # Unknown-size Folded Reload
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; ZVFH-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
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; ZVFH-NEXT: vse16.v v8, (s0)
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; ZVFH-NEXT: csrr a0, vlenb
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; ZVFH-NEXT: add sp, sp, a0
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; ZVFH-NEXT: .cfi_def_cfa sp, 32
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; ZVFH-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
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; ZVFH-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
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; ZVFH-NEXT: .cfi_restore ra
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; ZVFH-NEXT: .cfi_restore s0
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; ZVFH-NEXT: addi sp, sp, 32
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; ZVFH-NEXT: .cfi_def_cfa_offset 0
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; ZVFH-NEXT: ret
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%p0 = getelementptr i8, ptr %p, i64 0
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%p1 = getelementptr i8, ptr %p, i64 2
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%x0 = load half, ptr %p0
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%x1 = load half, ptr %p1
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call void @g()
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%q0 = getelementptr i8, ptr %q, i64 0
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%q1 = getelementptr i8, ptr %q, i64 2
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store half %x0, ptr %q0
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store half %x1, ptr %q1
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ret void
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}
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; TODO: This one is currently a vector which is unprofitable, we should
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; use i64 instead.
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define void @two_float(ptr %p, ptr %q) {
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; CHECK-LABEL: two_float:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -32
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; CHECK-NEXT: .cfi_offset ra, -8
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; CHECK-NEXT: .cfi_offset s0, -16
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; CHECK-NEXT: csrr a2, vlenb
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; CHECK-NEXT: sub sp, sp, a2
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; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x20, 0x22, 0x11, 0x01, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 32 + 1 * vlenb
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; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
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; CHECK-NEXT: vle32.v v8, (a0)
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; CHECK-NEXT: addi a0, sp, 16
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; CHECK-NEXT: vs1r.v v8, (a0) # Unknown-size Folded Spill
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; CHECK-NEXT: mv s0, a1
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; CHECK-NEXT: call g
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; CHECK-NEXT: addi a0, sp, 16
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; CHECK-NEXT: vl1r.v v8, (a0) # Unknown-size Folded Reload
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; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
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; CHECK-NEXT: vse32.v v8, (s0)
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; CHECK-NEXT: csrr a0, vlenb
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; CHECK-NEXT: add sp, sp, a0
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; CHECK-NEXT: .cfi_def_cfa sp, 32
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; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
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; CHECK-NEXT: .cfi_restore ra
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; CHECK-NEXT: .cfi_restore s0
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; CHECK-NEXT: addi sp, sp, 32
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; CHECK-NEXT: .cfi_def_cfa_offset 0
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; CHECK-NEXT: ret
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%p0 = getelementptr i8, ptr %p, i64 0
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%p1 = getelementptr i8, ptr %p, i64 4
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%x0 = load float, ptr %p0
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%x1 = load float, ptr %p1
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call void @g()
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%q0 = getelementptr i8, ptr %q, i64 0
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%q1 = getelementptr i8, ptr %q, i64 4
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store float %x0, ptr %q0
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store float %x1, ptr %q1
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ret void
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}
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define void @two_double(ptr %p, ptr %q) {
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; CHECK-LABEL: two_double:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -32
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; CHECK-NEXT: .cfi_offset ra, -8
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; CHECK-NEXT: .cfi_offset s0, -16
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; CHECK-NEXT: csrr a2, vlenb
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; CHECK-NEXT: sub sp, sp, a2
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; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x20, 0x22, 0x11, 0x01, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 32 + 1 * vlenb
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; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma
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; CHECK-NEXT: vle64.v v8, (a0)
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; CHECK-NEXT: addi a0, sp, 16
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; CHECK-NEXT: vs1r.v v8, (a0) # Unknown-size Folded Spill
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; CHECK-NEXT: mv s0, a1
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; CHECK-NEXT: call g
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; CHECK-NEXT: addi a0, sp, 16
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; CHECK-NEXT: vl1r.v v8, (a0) # Unknown-size Folded Reload
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; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma
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; CHECK-NEXT: vse64.v v8, (s0)
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; CHECK-NEXT: csrr a0, vlenb
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; CHECK-NEXT: add sp, sp, a0
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; CHECK-NEXT: .cfi_def_cfa sp, 32
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; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
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; CHECK-NEXT: .cfi_restore ra
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; CHECK-NEXT: .cfi_restore s0
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; CHECK-NEXT: addi sp, sp, 32
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; CHECK-NEXT: .cfi_def_cfa_offset 0
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; CHECK-NEXT: ret
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%p0 = getelementptr i8, ptr %p, i64 0
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%p1 = getelementptr i8, ptr %p, i64 8
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%x0 = load double, ptr %p0
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%x1 = load double, ptr %p1
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call void @g()
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%q0 = getelementptr i8, ptr %q, i64 0
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%q1 = getelementptr i8, ptr %q, i64 8
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store double %x0, ptr %q0
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store double %x1, ptr %q1
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ret void
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}

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