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[Target] Use llvm::replace (NFC) (#105942)
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3 files changed

+3
-10
lines changed

3 files changed

+3
-10
lines changed

llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2517,9 +2517,7 @@ static void updateRegisterMapForDbgValueListAfterMove(
25172517
if (RegIt == RegisterMap.end())
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return;
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auto &InstrVec = RegIt->getSecond();
2520-
for (unsigned I = 0; I < InstrVec.size(); I++)
2521-
if (InstrVec[I] == InstrToReplace)
2522-
InstrVec[I] = DbgValueListInstr;
2520+
llvm::replace(InstrVec, InstrToReplace, DbgValueListInstr);
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});
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}
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llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2002,10 +2002,7 @@ SmallVector<uint32_t, 8> HvxSelector::getPerfectCompletions(ShuffleMask SM,
20022002
if ((unsigned)llvm::popcount(P) < Count) {
20032003
// Reset all occurences of P, if there are more occurrences of P
20042004
// than there are bits in P.
2005-
for (unsigned &Q : Worklist) {
2006-
if (Q == P)
2007-
Q = 0;
2008-
}
2005+
llvm::replace(Worklist, P, 0U);
20092006
}
20102007
}
20112008

llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -35781,9 +35781,7 @@ X86TargetLowering::EmitLoweredIndirectThunk(MachineInstr &MI,
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// Zero out any registers that are already used.
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for (const auto &MO : MI.operands()) {
3578335783
if (MO.isReg() && MO.isUse())
35784-
for (unsigned &Reg : AvailableRegs)
35785-
if (Reg == MO.getReg())
35786-
Reg = 0;
35784+
llvm::replace(AvailableRegs, static_cast<unsigned>(MO.getReg()), 0U);
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}
3578835786

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// Choose the first remaining non-zero available register.

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