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[TypePromotion] Don't treat bitcast as a Source
This removes BitCasts from isSource in Type Promotion, as I don't believe they need to be treated as Sources. They will usually be from floats or hoisted constants, where constants will be handled already. This fixes #62513, but didn't otherwise cause any differences in the tests I ran. Differential Revision: https://reviews.llvm.org/D152112
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3 files changed

+78
-6
lines changed

3 files changed

+78
-6
lines changed

llvm/lib/CodeGen/TypePromotion.cpp

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -235,8 +235,6 @@ bool TypePromotionImpl::isSource(Value *V) {
235235
return true;
236236
else if (isa<LoadInst>(V))
237237
return true;
238-
else if (isa<BitCastInst>(V))
239-
return true;
240238
else if (auto *Call = dyn_cast<CallInst>(V))
241239
return Call->hasRetAttr(Attribute::AttrKind::ZExt);
242240
else if (auto *Trunc = dyn_cast<TruncInst>(V))
@@ -724,8 +722,9 @@ bool TypePromotionImpl::isSupportedValue(Value *V) {
724722
case Instruction::Ret:
725723
case Instruction::Load:
726724
case Instruction::Trunc:
727-
case Instruction::BitCast:
728725
return isSupportedType(I);
726+
case Instruction::BitCast:
727+
return I->getOperand(0)->getType() == I->getType();
729728
case Instruction::ZExt:
730729
return isSupportedType(I->getOperand(0));
731730
case Instruction::ICmp:
Lines changed: 47 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,47 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
2+
; RUN: opt -mtriple=aarch64 -passes=typepromotion,verify,dce -S %s -o - | FileCheck %s
3+
4+
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
5+
6+
define i1 @v8i8bitcast(<8 x i8> %a) {
7+
; CHECK-LABEL: define i1 @v8i8bitcast
8+
; CHECK-SAME: (<8 x i8> [[A:%.*]]) {
9+
; CHECK-NEXT: entry:
10+
; CHECK-NEXT: [[C:%.*]] = icmp slt <8 x i8> [[A]], zeroinitializer
11+
; CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i1> [[C]] to i8
12+
; CHECK-NEXT: [[N:%.*]] = icmp eq i8 [[TMP0]], 0
13+
; CHECK-NEXT: ret i1 [[N]]
14+
;
15+
entry:
16+
%c = icmp slt <8 x i8> %a, zeroinitializer
17+
%0 = bitcast <8 x i1> %c to i8
18+
%n = icmp eq i8 %0, 0
19+
ret i1 %n
20+
}
21+
22+
define i1 @halfbitcast() {
23+
; CHECK-LABEL: define i1 @halfbitcast() {
24+
; CHECK-NEXT: entry:
25+
; CHECK-NEXT: [[TMP0:%.*]] = bitcast half 0xH8000 to i16
26+
; CHECK-NEXT: [[DOTNOT114:%.*]] = icmp eq i16 [[TMP0]], 0
27+
; CHECK-NEXT: ret i1 [[DOTNOT114]]
28+
;
29+
entry:
30+
%0 = bitcast half 0xH8000 to i16
31+
%.not114 = icmp eq i16 %0, 0
32+
ret i1 %.not114
33+
}
34+
35+
define i1 @v8i8constant(<8 x i1> %a) {
36+
; CHECK-LABEL: define i1 @v8i8constant
37+
; CHECK-SAME: (<8 x i1> [[A:%.*]]) {
38+
; CHECK-NEXT: entry:
39+
; CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i1> <i1 true, i1 true, i1 true, i1 false, i1 true, i1 true, i1 true, i1 true> to i8
40+
; CHECK-NEXT: [[DOTNOT114:%.*]] = icmp eq i8 [[TMP0]], 0
41+
; CHECK-NEXT: ret i1 [[DOTNOT114]]
42+
;
43+
entry:
44+
%0 = bitcast <8 x i1> <i1 1, i1 1, i1 1, i1 0, i1 1, i1 1, i1 1, i1 1> to i8
45+
%.not114 = icmp eq i8 %0, 0
46+
ret i1 %.not114
47+
}

llvm/test/Transforms/TypePromotion/ARM/casts.ll

Lines changed: 29 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -248,10 +248,9 @@ define i16 @bitcast_i16(i16 zeroext %arg0, i16 zeroext %arg1) {
248248
; CHECK-LABEL: @bitcast_i16(
249249
; CHECK-NEXT: entry:
250250
; CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[ARG0:%.*]] to i32
251-
; CHECK-NEXT: [[CAST:%.*]] = bitcast i16 12345 to i16
252-
; CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[CAST]] to i32
251+
; CHECK-NEXT: [[CAST:%.*]] = bitcast i32 12345 to i32
253252
; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[TMP0]], 1
254-
; CHECK-NEXT: [[CMP:%.*]] = icmp ule i32 [[ADD]], [[TMP1]]
253+
; CHECK-NEXT: [[CMP:%.*]] = icmp ule i32 [[ADD]], [[CAST]]
255254
; CHECK-NEXT: [[RES:%.*]] = select i1 [[CMP]], i16 [[ARG1:%.*]], i16 32657
256255
; CHECK-NEXT: ret i16 [[RES]]
257256
;
@@ -1105,3 +1104,30 @@ exit:
11051104
%res = phi float [ 0.0, %entry ], [ %div, %if.end ]
11061105
ret float %res
11071106
}
1107+
1108+
define i32 @bitcasted() {
1109+
; CHECK-LABEL: @bitcasted(
1110+
; CHECK-NEXT: entry:
1111+
; CHECK-NEXT: br label [[LOOP:%.*]]
1112+
; CHECK: loop:
1113+
; CHECK-NEXT: [[T157_PH:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[T145_OLD:%.*]], [[LATCH:%.*]] ]
1114+
; CHECK-NEXT: [[EXT:%.*]] = zext i32 [[T157_PH]] to i64
1115+
; CHECK-NEXT: br label [[LATCH]]
1116+
; CHECK: latch:
1117+
; CHECK-NEXT: [[T145_OLD]] = bitcast i32 8 to i32
1118+
; CHECK-NEXT: [[T146_OLD:%.*]] = bitcast i32 [[T145_OLD]] to i32
1119+
; CHECK-NEXT: br label [[LOOP]]
1120+
;
1121+
entry:
1122+
br label %loop
1123+
1124+
loop:
1125+
%t157.ph = phi i32 [ 0, %entry ], [ %t145.old, %latch ]
1126+
%ext = zext i32 %t157.ph to i64
1127+
br label %latch
1128+
1129+
latch:
1130+
%t145.old = bitcast i32 8 to i32
1131+
%t146.old = bitcast i32 %t145.old to i32
1132+
br label %loop
1133+
}

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