Skip to content

Commit a651eed

Browse files
committed
fix code style
1 parent 7b35f9b commit a651eed

File tree

1 file changed

+1
-1
lines changed

1 file changed

+1
-1
lines changed

llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8611,7 +8611,7 @@ SDValue TargetLowering::expandFMINIMUMNUM_FMAXIMUMNUM(SDNode *Node,
86118611
EVT RCCVT = CCVT;
86128612
// expandIS_FPCLASS is buggy for GPR32+FPR64. Let's round them to single for
86138613
// this case.
8614-
if (!isOperationLegal (ISD::BITCAST, VT.changeTypeToInteger())) {
8614+
if (!isOperationLegal(ISD::BITCAST, VT.changeTypeToInteger())) {
86158615
LRound = DAG.getNode(ISD::FP_ROUND, DL, MVT::f32, LHS,
86168616
DAG.getIntPtrConstant(0, DL, /*isTarget=*/true));
86178617
RRound = DAG.getNode(ISD::FP_ROUND, DL, MVT::f32, RHS,

0 commit comments

Comments
 (0)