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yamtyamt
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add a few tests
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‎llvm/test/Transforms/PhaseOrdering/X86/merge-functions2.ll

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; RUN: opt -passes="default<O3>" -enable-merge-functions -S < %s | FileCheck %s
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target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx12.0.0"
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; Function Attrs: noinline nounwind optsize ssp uwtable
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define i32 @f(i32 noundef %x) #0 {
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; CHECK-LABEL: @f(
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entry:
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%x.addr = alloca i32, align 4
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store i32 %x, ptr %x.addr, align 4, !tbaa !5
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%0 = load i32, ptr %x.addr, align 4, !tbaa !5
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switch i32 %0, label %sw.default [
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i32 0, label %sw.bb
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i32 2, label %sw.bb
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i32 4, label %sw.bb
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i32 6, label %sw.bb
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i32 7, label %sw.bb
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]
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sw.bb: ; preds = %entry, %entry, %entry, %entry, %entry
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store i32 1, ptr %x.addr, align 4, !tbaa !5
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br label %sw.epilog
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sw.default: ; preds = %entry
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store i32 0, ptr %x.addr, align 4, !tbaa !5
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br label %sw.epilog
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sw.epilog: ; preds = %sw.default, %sw.bb
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%1 = load i32, ptr %x.addr, align 4, !tbaa !5
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ret i32 %1
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}
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; Function Attrs: noinline nounwind optsize ssp uwtable
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define i32 @g(i32 noundef %x) #0 {
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; CHECK-LABEL: @g(
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; CHECK-NEXT: [[TMP2:%.*]] = tail call range(i32 0, 2) i32 @f(i32 noundef [[TMP0:%.*]]) #[[ATTR0:[0-9]+]]
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; CHECK-NEXT: ret i32 [[TMP2]]
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entry:
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%x.addr = alloca i32, align 4
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store i32 %x, ptr %x.addr, align 4, !tbaa !5
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%0 = load i32, ptr %x.addr, align 4, !tbaa !5
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switch i32 %0, label %sw.default [
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i32 0, label %sw.bb
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i32 2, label %sw.bb
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i32 4, label %sw.bb
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i32 6, label %sw.bb
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i32 7, label %sw.bb
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]
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sw.bb: ; preds = %entry, %entry, %entry, %entry, %entry
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store i32 1, ptr %x.addr, align 4, !tbaa !5
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br label %sw.epilog
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sw.default: ; preds = %entry
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store i32 0, ptr %x.addr, align 4, !tbaa !5
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br label %sw.epilog
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sw.epilog: ; preds = %sw.default, %sw.bb
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%1 = load i32, ptr %x.addr, align 4, !tbaa !5
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ret i32 %1
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}
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!5 = !{!6, !6, i64 0}
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!6 = !{!"int", !7, i64 0}
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!7 = !{!"omnipotent char", !8, i64 0}
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!8 = !{!"Simple C/C++ TBAA"}

‎llvm/test/Transforms/PhaseOrdering/X86/merge-functions3.ll

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; RUN: opt -passes="default<O3>" -enable-merge-functions -S < %s | FileCheck %s
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target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx12.0.0"
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@switch.table.f = private unnamed_addr constant [8 x i32] [i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 1], align 4
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@switch.table.g = private unnamed_addr constant [8 x i32] [i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 1], align 4
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; Function Attrs: mustprogress nofree noinline norecurse nosync nounwind optsize ssp willreturn memory(none) uwtable
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define range(i32 0, 2) i32 @f(i32 noundef %x) local_unnamed_addr #0 {
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; CHECK-LABEL: @f(
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entry:
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%0 = icmp ult i32 %x, 8
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br i1 %0, label %switch.lookup, label %sw.epilog
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switch.lookup: ; preds = %entry
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%1 = zext nneg i32 %x to i64
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%switch.gep = getelementptr inbounds [8 x i32], ptr @switch.table.f, i64 0, i64 %1
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%switch.load = load i32, ptr %switch.gep, align 4
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br label %sw.epilog
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sw.epilog: ; preds = %entry, %switch.lookup
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%x.addr.0 = phi i32 [ %switch.load, %switch.lookup ], [ 0, %entry ]
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ret i32 %x.addr.0
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}
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; Function Attrs: mustprogress nofree noinline norecurse nosync nounwind optsize ssp willreturn memory(none) uwtable
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define range(i32 0, 2) i32 @g(i32 noundef %x) local_unnamed_addr #0 {
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; CHECK-LABEL: @g(
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; CHECK-NEXT: [[TMP2:%.*]] = tail call range(i32 0, 2) i32 @f(i32 noundef [[TMP0:%.*]]) #[[ATTR0:[0-9]+]]
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; CHECK-NEXT: ret i32 [[TMP2]]
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entry:
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%0 = icmp ult i32 %x, 8
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br i1 %0, label %switch.lookup, label %sw.epilog
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switch.lookup: ; preds = %entry
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%1 = zext nneg i32 %x to i64
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%switch.gep = getelementptr inbounds [8 x i32], ptr @switch.table.g, i64 0, i64 %1
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%switch.load = load i32, ptr %switch.gep, align 4
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br label %sw.epilog
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sw.epilog: ; preds = %entry, %switch.lookup
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%x.addr.0 = phi i32 [ %switch.load, %switch.lookup ], [ 0, %entry ]
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ret i32 %x.addr.0
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}
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attributes #0 = { mustprogress nofree noinline norecurse nosync nounwind optsize ssp willreturn memory(none) uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="penryn" "target-features"="+cmov,+cx16,+cx8,+fxsr,+mmx,+sahf,+sse,+sse2,+sse3,+sse4.1,+ssse3,+x87" "tune-cpu"="generic" }

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