[SLP][NFC]Make whole reg non-power-2 test for x86 and aarch64 along with risc-v

Author: alexey-bataev

llvm/test/Transforms/SLPVectorizer/RISCV/reduction-whole-regs-loads.ll renamed to llvm/test/Transforms/SLPVectorizer/reduction-whole-regs-loads.ll

@@ -1,5 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=riscv64-unknown-linux -mattr=+v -slp-threshold=-100 | FileCheck %s
+; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=x86_64-unknown-linux -mattr=+v -slp-threshold=-100 | FileCheck %s
+; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=aarch64-unknown-linux -mattr=+v -slp-threshold=-100 | FileCheck %s
+; REQUIRES: aarch64-registered-target, x86-registered-target, riscv-registered-target
 
 define i64 @test(ptr %p) {
 ; CHECK-LABEL: @test(