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fix code style
1 parent 7b35f9b commit a78fc31

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+24
-25
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1 file changed

+24
-25
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llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Lines changed: 24 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -8605,32 +8605,31 @@ SDValue TargetLowering::expandFMINIMUMNUM_FMAXIMUMNUM(SDNode *Node,
86058605
if (Options.NoSignedZerosFPMath || Flags.hasNoSignedZeros() ||
86068606
DAG.isKnownNeverZeroFloat(LHS) || DAG.isKnownNeverZeroFloat(RHS)) {
86078607
return MinMax;
8608-
} else {
8609-
SDValue LRound = LHS;
8610-
SDValue RRound = RHS;
8611-
EVT RCCVT = CCVT;
8612-
// expandIS_FPCLASS is buggy for GPR32+FPR64. Let's round them to single for
8613-
// this case.
8614-
if (!isOperationLegal (ISD::BITCAST, VT.changeTypeToInteger())) {
8615-
LRound = DAG.getNode(ISD::FP_ROUND, DL, MVT::f32, LHS,
8616-
DAG.getIntPtrConstant(0, DL, /*isTarget=*/true));
8617-
RRound = DAG.getNode(ISD::FP_ROUND, DL, MVT::f32, RHS,
8618-
DAG.getIntPtrConstant(0, DL, /*isTarget=*/true));
8619-
RCCVT =
8620-
getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), MVT::f32);
8621-
}
8622-
SDValue TestZero =
8623-
DAG.getTargetConstant(IsMax ? fcPosZero : fcNegZero, DL, MVT::i32);
8624-
SDValue IsZero = DAG.getSetCC(DL, CCVT, MinMax,
8625-
DAG.getConstantFP(0.0, DL, VT), ISD::SETEQ);
8626-
SDValue LCmp = DAG.getSelect(
8627-
DL, VT, DAG.getNode(ISD::IS_FPCLASS, DL, RCCVT, LRound, TestZero), LHS,
8628-
MinMax, Flags);
8629-
SDValue RCmp = DAG.getSelect(
8630-
DL, VT, DAG.getNode(ISD::IS_FPCLASS, DL, RCCVT, RRound, TestZero), RHS,
8631-
LCmp, Flags);
8632-
return DAG.getSelect(DL, VT, IsZero, RCmp, MinMax, Flags);
86338608
}
8609+
SDValue LRound = LHS;
8610+
SDValue RRound = RHS;
8611+
EVT RCCVT = CCVT;
8612+
// expandIS_FPCLASS is buggy for GPR32+FPR64. Let's round them to single for
8613+
// this case.
8614+
if (!isOperationLegal(ISD::BITCAST, VT.changeTypeToInteger())) {
8615+
LRound = DAG.getNode(ISD::FP_ROUND, DL, MVT::f32, LHS,
8616+
DAG.getIntPtrConstant(0, DL, /*isTarget=*/true));
8617+
RRound = DAG.getNode(ISD::FP_ROUND, DL, MVT::f32, RHS,
8618+
DAG.getIntPtrConstant(0, DL, /*isTarget=*/true));
8619+
RCCVT =
8620+
getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), MVT::f32);
8621+
}
8622+
SDValue TestZero =
8623+
DAG.getTargetConstant(IsMax ? fcPosZero : fcNegZero, DL, MVT::i32);
8624+
SDValue IsZero = DAG.getSetCC(DL, CCVT, MinMax,
8625+
DAG.getConstantFP(0.0, DL, VT), ISD::SETEQ);
8626+
SDValue LCmp = DAG.getSelect(
8627+
DL, VT, DAG.getNode(ISD::IS_FPCLASS, DL, RCCVT, LRound, TestZero), LHS,
8628+
MinMax, Flags);
8629+
SDValue RCmp = DAG.getSelect(
8630+
DL, VT, DAG.getNode(ISD::IS_FPCLASS, DL, RCCVT, RRound, TestZero), RHS,
8631+
LCmp, Flags);
8632+
return DAG.getSelect(DL, VT, IsZero, RCmp, MinMax, Flags);
86348633
}
86358634

86368635
/// Returns a true value if if this FPClassTest can be performed with an ordered

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