Skip to content

Commit a79739d

Browse files
!fixup remove super
1 parent 9a5b773 commit a79739d

File tree

1 file changed

+2
-2
lines changed

1 file changed

+2
-2
lines changed

llvm/lib/Target/RISCV/RISCVSchedSiFive7.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -213,8 +213,8 @@ let SchedModel = SiFive7Model in {
213213
let BufferSize = 0 in {
214214
def SiFive7PipeA : ProcResource<1>;
215215
def SiFive7PipeB : ProcResource<1>;
216-
def SiFive7IDiv : ProcResource<1> { let Super = SiFive7PipeB; } // Int Division
217-
def SiFive7FDiv : ProcResource<1> { let Super = SiFive7PipeB; } // FP Division/Sqrt
216+
def SiFive7IDiv : ProcResource<1>; // Int Division
217+
def SiFive7FDiv : ProcResource<1>; // FP Division/Sqrt
218218
def SiFive7PipeV : ProcResource<1>;
219219
}
220220

0 commit comments

Comments
 (0)