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1 parent 9a5b773 commit a79739dCopy full SHA for a79739d
llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
@@ -213,8 +213,8 @@ let SchedModel = SiFive7Model in {
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let BufferSize = 0 in {
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def SiFive7PipeA : ProcResource<1>;
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def SiFive7PipeB : ProcResource<1>;
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-def SiFive7IDiv : ProcResource<1> { let Super = SiFive7PipeB; } // Int Division
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-def SiFive7FDiv : ProcResource<1> { let Super = SiFive7PipeB; } // FP Division/Sqrt
+def SiFive7IDiv : ProcResource<1>; // Int Division
+def SiFive7FDiv : ProcResource<1>; // FP Division/Sqrt
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def SiFive7PipeV : ProcResource<1>;
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}
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