@@ -607,8 +607,8 @@ define <2 x i8> @ashr_known_pos_exact_vec(<2 x i8> %x, <2 x i8> %y) {
607
607
608
608
define i32 @lshr_mul_times_3_div_2 (i32 %0 ) {
609
609
; CHECK-LABEL: @lshr_mul_times_3_div_2(
610
- ; CHECK-NEXT: [[MUL :%.*]] = mul nuw nsw i32 [[TMP0:%.*]], 3
611
- ; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[MUL ]], 1
610
+ ; CHECK-NEXT: [[TMP2 :%.*]] = lshr i32 [[TMP0:%.*]], 1
611
+ ; CHECK-NEXT: [[LSHR:%.*]] = add nuw nsw i32 [[TMP2 ]], [[TMP0]]
612
612
; CHECK-NEXT: ret i32 [[LSHR]]
613
613
;
614
614
%mul = mul nsw nuw i32 %0 , 3
@@ -618,8 +618,8 @@ define i32 @lshr_mul_times_3_div_2(i32 %0) {
618
618
619
619
define i32 @lshr_mul_times_3_div_2_exact (i32 %x ) {
620
620
; CHECK-LABEL: @lshr_mul_times_3_div_2_exact(
621
- ; CHECK-NEXT: [[MUL :%.*]] = mul nsw i32 [[X:%.*]], 3
622
- ; CHECK-NEXT: [[LSHR:%.*]] = lshr exact i32 [[MUL ]], 1
621
+ ; CHECK-NEXT: [[TMP1 :%.*]] = lshr exact i32 [[X:%.*]], 1
622
+ ; CHECK-NEXT: [[LSHR:%.*]] = add nsw i32 [[TMP1 ]], [[X]]
623
623
; CHECK-NEXT: ret i32 [[LSHR]]
624
624
;
625
625
%mul = mul nsw i32 %x , 3
@@ -657,8 +657,8 @@ define i32 @mul_times_3_div_2_multiuse_lshr(i32 %x) {
657
657
658
658
define i32 @lshr_mul_times_3_div_2_exact_2 (i32 %x ) {
659
659
; CHECK-LABEL: @lshr_mul_times_3_div_2_exact_2(
660
- ; CHECK-NEXT: [[MUL :%.*]] = mul nuw i32 [[X:%.*]], 3
661
- ; CHECK-NEXT: [[LSHR:%.*]] = lshr exact i32 [[MUL ]], 1
660
+ ; CHECK-NEXT: [[TMP1 :%.*]] = lshr exact i32 [[X:%.*]], 1
661
+ ; CHECK-NEXT: [[LSHR:%.*]] = add nuw i32 [[TMP1 ]], [[X]]
662
662
; CHECK-NEXT: ret i32 [[LSHR]]
663
663
;
664
664
%mul = mul nuw i32 %x , 3
@@ -668,8 +668,8 @@ define i32 @lshr_mul_times_3_div_2_exact_2(i32 %x) {
668
668
669
669
define i32 @lshr_mul_times_5_div_4 (i32 %0 ) {
670
670
; CHECK-LABEL: @lshr_mul_times_5_div_4(
671
- ; CHECK-NEXT: [[MUL :%.*]] = mul nuw nsw i32 [[TMP0:%.*]], 5
672
- ; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[MUL ]], 2
671
+ ; CHECK-NEXT: [[TMP2 :%.*]] = lshr i32 [[TMP0:%.*]], 2
672
+ ; CHECK-NEXT: [[LSHR:%.*]] = add nuw nsw i32 [[TMP2 ]], [[TMP0]]
673
673
; CHECK-NEXT: ret i32 [[LSHR]]
674
674
;
675
675
%mul = mul nsw nuw i32 %0 , 5
@@ -679,8 +679,8 @@ define i32 @lshr_mul_times_5_div_4(i32 %0) {
679
679
680
680
define i32 @lshr_mul_times_5_div_4_exact (i32 %x ) {
681
681
; CHECK-LABEL: @lshr_mul_times_5_div_4_exact(
682
- ; CHECK-NEXT: [[MUL :%.*]] = mul nsw i32 [[X:%.*]], 5
683
- ; CHECK-NEXT: [[LSHR:%.*]] = lshr exact i32 [[MUL ]], 2
682
+ ; CHECK-NEXT: [[TMP1 :%.*]] = lshr exact i32 [[X:%.*]], 2
683
+ ; CHECK-NEXT: [[LSHR:%.*]] = add nsw i32 [[TMP1 ]], [[X]]
684
684
; CHECK-NEXT: ret i32 [[LSHR]]
685
685
;
686
686
%mul = mul nsw i32 %x , 5
@@ -718,8 +718,8 @@ define i32 @mul_times_5_div_4_multiuse_lshr(i32 %x) {
718
718
719
719
define i32 @lshr_mul_times_5_div_4_exact_2 (i32 %x ) {
720
720
; CHECK-LABEL: @lshr_mul_times_5_div_4_exact_2(
721
- ; CHECK-NEXT: [[MUL :%.*]] = mul nuw i32 [[X:%.*]], 5
722
- ; CHECK-NEXT: [[LSHR:%.*]] = lshr exact i32 [[MUL ]], 2
721
+ ; CHECK-NEXT: [[TMP1 :%.*]] = lshr exact i32 [[X:%.*]], 2
722
+ ; CHECK-NEXT: [[LSHR:%.*]] = add nuw i32 [[TMP1 ]], [[X]]
723
723
; CHECK-NEXT: ret i32 [[LSHR]]
724
724
;
725
725
%mul = mul nuw i32 %x , 5
0 commit comments