[SelectionDAG] Propagate Disjoint flag.

Signed-off-by: feng.feng <[email protected]>

Author: fengfeng09

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

@@ -9530,7 +9530,8 @@ static SDValue combineShiftOfShiftedLogic(SDNode *Shift, SelectionDAG &DAG) {
   SDValue ShiftSumC = DAG.getConstant(*C0Val + C1Val, DL, ShiftAmtVT);
   SDValue NewShift1 = DAG.getNode(ShiftOpcode, DL, VT, X, ShiftSumC);
   SDValue NewShift2 = DAG.getNode(ShiftOpcode, DL, VT, Y, C1);
-  return DAG.getNode(LogicOpcode, DL, VT, NewShift1, NewShift2);
+  return DAG.getNode(LogicOpcode, DL, VT, NewShift1, NewShift2,
+                     LogicOp->getFlags());
 }
 
 /// Handle transforms common to the three shifts, when the shift amount is a

llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

@@ -544,7 +544,8 @@ bool TargetLowering::ShrinkDemandedConstant(SDValue Op,
     if (!C.isSubsetOf(DemandedBits)) {
       EVT VT = Op.getValueType();
       SDValue NewC = TLO.DAG.getConstant(DemandedBits & C, DL, VT);
-      SDValue NewOp = TLO.DAG.getNode(Opcode, DL, VT, Op.getOperand(0), NewC);
+      SDValue NewOp = TLO.DAG.getNode(Opcode, DL, VT, Op.getOperand(0), NewC,
+                                      Op->getFlags());
       return TLO.CombineTo(Op, NewOp);
     }
 

llvm/test/CodeGen/X86/propagate-disjoint-in-shl-or.ll

@@ -5,9 +5,7 @@ define i32 @add_shl_or_disjoint(i32 %x) {
 ; CHECK-LABEL: add_shl_or_disjoint:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    # kill: def $edi killed $edi def $rdi
-; CHECK-NEXT:    leal (,%rdi,4), %eax
-; CHECK-NEXT:    orl $-1069531068, %eax # imm = 0xC0404044
-; CHECK-NEXT:    addl $1234567890, %eax # imm = 0x499602D2
+; CHECK-NEXT:    leal 165036822(,%rdi,4), %eax
 ; CHECK-NEXT:    retq
   %or = or disjoint i32 %x, 4027584529
   %shl = shl i32 %or, 2