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[clang][NFC] Bitfield access unit tests (#65742)
Verify bitfield access units.
1 parent 7344e99 commit a8ca4ab

11 files changed

+1534
-23
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‎clang/test/CodeGen/aapcs-bitfield-access-unit.c

Lines changed: 231 additions & 0 deletions
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// RUN: %clang_cc1 -triple armv8-none-linux-eabi -fno-aapcs-bitfield-width -fdump-record-layouts-simple -emit-llvm -o /dev/null %s | FileCheck %s -check-prefixes=LAYOUT
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// RUN: %clang_cc1 -triple armebv8-none-linux-eabi -fno-aapcs-bitfield-width -fdump-record-layouts-simple -emit-llvm -o /dev/null %s | FileCheck %s -check-prefixes=LAYOUT
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// RUN: %clang_cc1 -triple armv8-none-linux-eabi -faapcs-bitfield-width -fdump-record-layouts-simple -emit-llvm -o /dev/null %s | FileCheck %s -check-prefixes=LAYOUT
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// RUN: %clang_cc1 -triple armebv8-none-linux-eabi -faapcs-bitfield-width -fdump-record-layouts-simple -emit-llvm -o /dev/null %s | FileCheck %s -check-prefixes=LAYOUT
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struct st0 {
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short c : 7;
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} st0;
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// LAYOUT-LABEL: LLVMType:%struct.st0 =
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// LAYOUT-SAME: type { i8, i8 }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:1 StorageSize:8 StorageOffset:0
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// LAYOUT-NEXT: ]>
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struct st1 {
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int a : 10;
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short c : 6;
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} st1;
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// LAYOUT-LABEL: LLVMType:%struct.st1 =
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// LAYOUT-SAME: type { i16, [2 x i8] }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:10 IsSigned:1 StorageSize:16 StorageOffset:0
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:6 IsSigned:1 StorageSize:16 StorageOffset:0
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// LAYOUT-NEXT: ]>
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struct st2 {
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int a : 10;
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short c : 7;
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} st2;
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// LAYOUT-LABEL: LLVMType:%struct.st2 =
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// LAYOUT-SAME: type { i16, i8 }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:10 IsSigned:1 StorageSize:16 StorageOffset:0
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:1 StorageSize:8 StorageOffset:2
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// LAYOUT-NEXT: ]>
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struct st3 {
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volatile short c : 7;
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} st3;
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// LAYOUT-LABEL: LLVMType:%struct.st3 =
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// LAYOUT-SAME: type { i8, i8 }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:1 StorageSize:8 StorageOffset:0
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// LAYOUT-NEXT: ]>
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struct st4 {
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int b : 9;
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volatile char c : 5;
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} st4;
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// LAYOUT-LABEL: LLVMType:%struct.st4 =
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// LAYOUT-SAME: type { i16, [2 x i8] }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:9 IsSigned:1 StorageSize:16 StorageOffset:0
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:5 IsSigned:1 StorageSize:16 StorageOffset:0
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// LAYOUT-NEXT: ]>
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struct st5 {
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int a : 12;
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volatile char c : 5;
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} st5;
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// LAYOUT-LABEL: LLVMType:%struct.st5 =
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// LAYOUT-SAME: type { i16, i8 }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:12 IsSigned:1 StorageSize:16 StorageOffset:0
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:5 IsSigned:1 StorageSize:8 StorageOffset:2
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// LAYOUT-NEXT: ]>
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struct st6 {
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int a : 12;
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char b;
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int c : 5;
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} st6;
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// LAYOUT-LABEL: LLVMType:%struct.st6 =
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// LAYOUT-SAME: type { i16, i8, i8 }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:12 IsSigned:1 StorageSize:16 StorageOffset:0
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:5 IsSigned:1 StorageSize:8 StorageOffset:3
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// LAYOUT-NEXT: ]>
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struct st7a {
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char a;
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int b : 5;
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} st7a;
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// LAYOUT-LABEL: LLVMType:%struct.st7a =
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// LAYOUT-SAME: type { i8, i8, [2 x i8] }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:5 IsSigned:1 StorageSize:8 StorageOffset:1
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// LAYOUT-NEXT: ]>
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struct st7b {
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char x;
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volatile struct st7a y;
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} st7b;
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// LAYOUT-LABEL: LLVMType:%struct.st7b =
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// LAYOUT-SAME: type { i8, [3 x i8], %struct.st7a }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: ]>
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struct st8 {
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unsigned f : 16;
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} st8;
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// LAYOUT-LABEL: LLVMType:%struct.st8 =
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// LAYOUT-SAME: type { i16, [2 x i8] }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:0 StorageSize:16 StorageOffset:0
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// LAYOUT-NEXT: ]>
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struct st9{
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int f : 8;
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} st9;
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// LAYOUT-LABEL: LLVMType:%struct.st9 =
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// LAYOUT-SAME: type { i8, [3 x i8] }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:1 StorageSize:8 StorageOffset:0
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// LAYOUT-NEXT: ]>
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struct st10{
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int e : 1;
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int f : 8;
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} st10;
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// LAYOUT-LABEL: LLVMType:%struct.st10 =
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// LAYOUT-SAME: type { i16, [2 x i8] }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:1 IsSigned:1 StorageSize:16 StorageOffset:0
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:1 StorageSize:16 StorageOffset:0
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// LAYOUT-NEXT: ]>
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struct st11{
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char e;
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int f : 16;
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} st11;
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// LAYOUT-LABEL: LLVMType:%struct.st11 =
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// LAYOUT-SAME: type <{ i8, i16, i8 }>
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:1 StorageSize:16 StorageOffset:1
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// LAYOUT-NEXT: ]>
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struct st12{
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int e : 8;
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int f : 16;
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} st12;
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// LAYOUT-LABEL: LLVMType:%struct.st12 =
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// LAYOUT-SAME: type { i24 }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:1 StorageSize:32 StorageOffset:0
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:1 StorageSize:32 StorageOffset:0
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// LAYOUT-NEXT: ]>
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struct st13 {
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char a : 8;
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int b : 32;
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} __attribute__((packed)) st13;
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// LAYOUT-LABEL: LLVMType:%struct.st13 =
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// LAYOUT-SAME: type { [5 x i8] }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:1 StorageSize:40 StorageOffset:0
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:32 IsSigned:1 StorageSize:40 StorageOffset:0
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// LAYOUT-NEXT: ]>
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struct st14 {
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char a : 8;
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} __attribute__((packed)) st14;
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// LAYOUT-LABEL: LLVMType:%struct.st14 =
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// LAYOUT-SAME: type { i8 }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:1 StorageSize:8 StorageOffset:0
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// LAYOUT-NEXT: ]>
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struct st15 {
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short a : 8;
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} __attribute__((packed)) st15;
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// LAYOUT-LABEL: LLVMType:%struct.st15 =
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// LAYOUT-SAME: type { i8 }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:1 StorageSize:8 StorageOffset:0
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// LAYOUT-NEXT: ]>
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struct st16 {
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int a : 32;
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int b : 16;
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int c : 32;
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int d : 16;
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} st16;
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// LAYOUT-LABEL: LLVMType:%struct.st16 =
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// LAYOUT-SAME: type { i48, i48 }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:32 IsSigned:1 StorageSize:64 StorageOffset:0
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:1 StorageSize:64 StorageOffset:0
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:32 IsSigned:1 StorageSize:64 StorageOffset:8
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:1 StorageSize:64 StorageOffset:8
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// LAYOUT-NEXT: ]>
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struct st17 {
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int b : 32;
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char c : 8;
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} __attribute__((packed)) st17;
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// LAYOUT-LABEL: LLVMType:%struct.st17 =
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// LAYOUT-SAME: type { [5 x i8] }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:32 IsSigned:1 StorageSize:40 StorageOffset:0
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:1 StorageSize:40 StorageOffset:0
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// LAYOUT-NEXT: ]>
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struct zero_bitfield {
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int a : 8;
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char : 0;
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int b : 8;
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} st18;
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// LAYOUT-LABEL: LLVMType:%struct.zero_bitfield =
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// LAYOUT-SAME: type { i8, i8, [2 x i8] }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:1 StorageSize:8 StorageOffset:0
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:1 StorageSize:8 StorageOffset:1
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// LAYOUT-NEXT: ]>
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struct zero_bitfield_ok {
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short a : 8;
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char a1 : 8;
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long : 0;
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int b : 24;
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} st19;
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// LAYOUT-LABEL: LLVMType:%struct.zero_bitfield_ok =
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// LAYOUT-SAME: type { i16, i24 }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:1 StorageSize:16 StorageOffset:0
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:1 StorageSize:16 StorageOffset:0
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:24 IsSigned:1 StorageSize:32 StorageOffset:4
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// LAYOUT-NEXT: ]>
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‎clang/test/CodeGen/arm-bitfield-alignment.c

Lines changed: 14 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,7 @@
1-
// RUN: %clang_cc1 -triple arm-none-eabi -ffreestanding -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -triple aarch64 -ffreestanding -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -triple arm-none-eabi -fdump-record-layouts-simple -ffreestanding -emit-llvm -o %t %s | FileCheck %s -check-prefix=LAYOUT
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// RUN: FileCheck %s -check-prefix=IR <%t
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// RUN: %clang_cc1 -triple aarch64 -fdump-record-layouts-simple -ffreestanding -emit-llvm -o %t %s | FileCheck %s -check-prefix=LAYOUT
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// RUN: FileCheck %s -check-prefix=IR <%t
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extern struct T {
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int b0 : 8;
@@ -11,5 +13,13 @@ int func(void) {
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return g.b1;
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}
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// CHECK: @g = external global %struct.T, align 4
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// CHECK: %{{.*}} = load i64, ptr @g, align 4
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// IR: @g = external global %struct.T, align 4
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// IR: %{{.*}} = load i64, ptr @g, align 4
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// LAYOUT-LABEL: LLVMType:%struct.T =
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// LAYOUT-SAME: type { i40 }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:0 Size:8 IsSigned:1 StorageSize:64 StorageOffset:0
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:8 Size:24 IsSigned:1 StorageSize:64 StorageOffset:0
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:32 Size:1 IsSigned:1 StorageSize:64 StorageOffset:0
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// LAYOUT-NEXT: ]>

‎clang/test/CodeGen/arm64-be-bitfield.c

Lines changed: 14 additions & 2 deletions
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@@ -1,11 +1,23 @@
1-
// RUN: %clang_cc1 -triple aarch64_be-linux-gnu -ffreestanding -emit-llvm -O0 -o - %s | FileCheck --check-prefix IR %s
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// RUN: %clang_cc1 -triple aarch64_be-linux-gnu -ffreestanding -emit-llvm -O0 -o %t -fdump-record-layouts-simple %s | FileCheck %s --check-prefix=LAYOUT
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// RUN: FileCheck %s --check-prefix=IR <%t
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struct bt3 { signed b2:10; signed b3:10; } b16;
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// Get the high 32-bits and then shift appropriately for big-endian.
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signed callee_b0f(struct bt3 bp11) {
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// IR: callee_b0f(i64 [[ARG:%.*]])
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// IR: [[BP11:%.*]] = alloca %struct.bt3, align 4
810
// IR: store i64 [[ARG]], ptr [[PTR:%.*]], align 8
9-
// IR: call void @llvm.memcpy.p0.p0.i64(ptr {{.*}}, ptr align 8 [[PTR]], i64 4
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// IR: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[BP11]], ptr align 8 [[PTR]], i64 4
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// IR: [[BF_LOAD:%.*]] = load i32, ptr [[BP11]], align 4
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// IR: [[BF_ASHR:%.*]] = ashr i32 [[BF_LOAD]], 22
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// IR: ret i32 [[BF_ASHR]]
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return bp11.b2;
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}
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// LAYOUT-LABEL: LLVMType:%struct.bt3 =
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// LAYOUT-SAME: type { i24 }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:22 Size:10 IsSigned:1 StorageSize:32 StorageOffset:0
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:12 Size:10 IsSigned:1 StorageSize:32 StorageOffset:0
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// LAYOUT-NEXT: ]>

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