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RKSimonRKSimon
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[X86] Regenerate test checks with vpternlog comments
1 parent 00c1c58 commit a9f5a44

13 files changed

+1391
-1391
lines changed

‎llvm/test/CodeGen/X86/avx512vl-logic.ll

Lines changed: 17 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -958,7 +958,7 @@ entry:
958958
define <4 x i32> @ternlog_and_andn(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
959959
; CHECK-LABEL: ternlog_and_andn:
960960
; CHECK: ## %bb.0:
961-
; CHECK-NEXT: vpternlogd $8, %xmm1, %xmm2, %xmm0
961+
; CHECK-NEXT: vpternlogd {{.*#+}} xmm0 = xmm2 & xmm1 & ~xmm0
962962
; CHECK-NEXT: retq
963963
%a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
964964
%b = and <4 x i32> %y, %a
@@ -969,7 +969,7 @@ define <4 x i32> @ternlog_and_andn(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
969969
define <4 x i32> @ternlog_or_andn(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
970970
; CHECK-LABEL: ternlog_or_andn:
971971
; CHECK: ## %bb.0:
972-
; CHECK-NEXT: vpternlogd $206, %xmm1, %xmm2, %xmm0
972+
; CHECK-NEXT: vpternlogd {{.*#+}} xmm0 = (xmm1 & ~xmm0) | xmm2
973973
; CHECK-NEXT: retq
974974
%a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
975975
%b = and <4 x i32> %y, %a
@@ -980,7 +980,7 @@ define <4 x i32> @ternlog_or_andn(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
980980
define <4 x i32> @ternlog_and_orn(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
981981
; CHECK-LABEL: ternlog_and_orn:
982982
; CHECK: ## %bb.0:
983-
; CHECK-NEXT: vpternlogd $176, %xmm1, %xmm2, %xmm0
983+
; CHECK-NEXT: vpternlogd {{.*#+}} xmm0 = xmm0 & (xmm1 | ~xmm2)
984984
; CHECK-NEXT: retq
985985
%a = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
986986
%b = or <4 x i32> %a, %y
@@ -991,7 +991,7 @@ define <4 x i32> @ternlog_and_orn(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
991991
define <4 x i32> @ternlog_and_orn_2(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
992992
; CHECK-LABEL: ternlog_and_orn_2:
993993
; CHECK: ## %bb.0:
994-
; CHECK-NEXT: vpternlogd $208, %xmm2, %xmm1, %xmm0
994+
; CHECK-NEXT: vpternlogd {{.*#+}} xmm0 = xmm0 & (xmm1 | ~xmm2)
995995
; CHECK-NEXT: retq
996996
%a = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
997997
%b = or <4 x i32> %y, %a
@@ -1006,7 +1006,7 @@ define <4 x i32> @ternlog_orn_and(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
10061006
; CHECK: ## %bb.0:
10071007
; CHECK-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
10081008
; CHECK-NEXT: vpand %xmm2, %xmm1, %xmm1
1009-
; CHECK-NEXT: vpternlogd $222, %xmm3, %xmm1, %xmm0
1009+
; CHECK-NEXT: vpternlogd {{.*#+}} xmm0 = xmm1 | (xmm0 ^ xmm3)
10101010
; CHECK-NEXT: retq
10111011
%a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
10121012
%b = and <4 x i32> %y, %z
@@ -1017,7 +1017,7 @@ define <4 x i32> @ternlog_orn_and(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
10171017
define <4 x i32> @ternlog_orn_and_2(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
10181018
; CHECK-LABEL: ternlog_orn_and_2:
10191019
; CHECK: ## %bb.0:
1020-
; CHECK-NEXT: vpternlogd $143, %xmm2, %xmm1, %xmm0
1020+
; CHECK-NEXT: vpternlogd {{.*#+}} xmm0 = (xmm1 & xmm2) | ~xmm0
10211021
; CHECK-NEXT: retq
10221022
%a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
10231023
%b = and <4 x i32> %y, %z
@@ -1028,7 +1028,7 @@ define <4 x i32> @ternlog_orn_and_2(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
10281028
define <4 x i32> @ternlog_xor_andn(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
10291029
; CHECK-LABEL: ternlog_xor_andn:
10301030
; CHECK: ## %bb.0:
1031-
; CHECK-NEXT: vpternlogd $198, %xmm1, %xmm2, %xmm0
1031+
; CHECK-NEXT: vpternlogd {{.*#+}} xmm0 = xmm2 ^ (xmm1 & ~xmm0)
10321032
; CHECK-NEXT: retq
10331033
%a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
10341034
%b = and <4 x i32> %y, %a
@@ -1039,7 +1039,7 @@ define <4 x i32> @ternlog_xor_andn(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
10391039
define <4 x i32> @ternlog_or_and_mask(<4 x i32> %x, <4 x i32> %y) {
10401040
; CHECK-LABEL: ternlog_or_and_mask:
10411041
; CHECK: ## %bb.0:
1042-
; CHECK-NEXT: vpternlogd $236, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm0
1042+
; CHECK-NEXT: vpternlogd {{.*#+}} xmm0 = (xmm0 & mem) | xmm1
10431043
; CHECK-NEXT: retq
10441044
%a = and <4 x i32> %x, <i32 255, i32 255, i32 255, i32 255>
10451045
%b = or <4 x i32> %a, %y
@@ -1049,7 +1049,7 @@ define <4 x i32> @ternlog_or_and_mask(<4 x i32> %x, <4 x i32> %y) {
10491049
define <8 x i32> @ternlog_or_and_mask_ymm(<8 x i32> %x, <8 x i32> %y) {
10501050
; CHECK-LABEL: ternlog_or_and_mask_ymm:
10511051
; CHECK: ## %bb.0:
1052-
; CHECK-NEXT: vpternlogd $236, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm0
1052+
; CHECK-NEXT: vpternlogd {{.*#+}} ymm0 = (ymm0 & mem) | ymm1
10531053
; CHECK-NEXT: retq
10541054
%a = and <8 x i32> %x, <i32 -16777216, i32 -16777216, i32 -16777216, i32 -16777216, i32 -16777216, i32 -16777216, i32 -16777216, i32 -16777216>
10551055
%b = or <8 x i32> %a, %y
@@ -1059,7 +1059,7 @@ define <8 x i32> @ternlog_or_and_mask_ymm(<8 x i32> %x, <8 x i32> %y) {
10591059
define <2 x i64> @ternlog_xor_and_mask(<2 x i64> %x, <2 x i64> %y) {
10601060
; CHECK-LABEL: ternlog_xor_and_mask:
10611061
; CHECK: ## %bb.0:
1062-
; CHECK-NEXT: vpternlogq $108, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm0
1062+
; CHECK-NEXT: vpternlogq {{.*#+}} xmm0 = xmm1 ^ (xmm0 & mem)
10631063
; CHECK-NEXT: retq
10641064
%a = and <2 x i64> %x, <i64 1099511627775, i64 1099511627775>
10651065
%b = xor <2 x i64> %a, %y
@@ -1069,7 +1069,7 @@ define <2 x i64> @ternlog_xor_and_mask(<2 x i64> %x, <2 x i64> %y) {
10691069
define <4 x i64> @ternlog_xor_and_mask_ymm(<4 x i64> %x, <4 x i64> %y) {
10701070
; CHECK-LABEL: ternlog_xor_and_mask_ymm:
10711071
; CHECK: ## %bb.0:
1072-
; CHECK-NEXT: vpternlogq $108, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm0
1072+
; CHECK-NEXT: vpternlogq {{.*#+}} ymm0 = ymm1 ^ (ymm0 & mem)
10731073
; CHECK-NEXT: retq
10741074
%a = and <4 x i64> %x, <i64 72057594037927935, i64 72057594037927935, i64 72057594037927935, i64 72057594037927935>
10751075
%b = xor <4 x i64> %a, %y
@@ -1081,7 +1081,7 @@ define <4 x i32> @ternlog_maskz_or_and_mask(<4 x i32> %x, <4 x i32> %y, <4 x i32
10811081
; CHECK: ## %bb.0:
10821082
; CHECK-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm2
10831083
; CHECK-NEXT: vpsrad $31, %xmm3, %xmm0
1084-
; CHECK-NEXT: vpternlogd $224, %xmm1, %xmm2, %xmm0
1084+
; CHECK-NEXT: vpternlogd {{.*#+}} xmm0 = xmm0 & (xmm2 | xmm1)
10851085
; CHECK-NEXT: retq
10861086
%m = icmp slt <4 x i32> %mask, zeroinitializer
10871087
%a = and <4 x i32> %x, <i32 255, i32 255, i32 255, i32 255>
@@ -1095,7 +1095,7 @@ define <8 x i32> @ternlog_maskz_or_and_mask_ymm(<8 x i32> %x, <8 x i32> %y, <8 x
10951095
; CHECK: ## %bb.0:
10961096
; CHECK-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm0, %ymm3
10971097
; CHECK-NEXT: vpsrad $31, %ymm2, %ymm0
1098-
; CHECK-NEXT: vpternlogd $224, %ymm1, %ymm3, %ymm0
1098+
; CHECK-NEXT: vpternlogd {{.*#+}} ymm0 = ymm0 & (ymm3 | ymm1)
10991099
; CHECK-NEXT: retq
11001100
%m = icmp slt <8 x i32> %mask, zeroinitializer
11011101
%a = and <8 x i32> %x, <i32 -16777216, i32 -16777216, i32 -16777216, i32 -16777216, i32 -16777216, i32 -16777216, i32 -16777216, i32 -16777216>
@@ -1109,7 +1109,7 @@ define <2 x i64> @ternlog_maskz_xor_and_mask(<2 x i64> %x, <2 x i64> %y, <2 x i6
11091109
; CHECK: ## %bb.0:
11101110
; CHECK-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm0, %xmm3
11111111
; CHECK-NEXT: vpsraq $63, %xmm2, %xmm0
1112-
; CHECK-NEXT: vpternlogq $96, %xmm1, %xmm3, %xmm0
1112+
; CHECK-NEXT: vpternlogq {{.*#+}} xmm0 = xmm0 & (xmm3 ^ xmm1)
11131113
; CHECK-NEXT: retq
11141114
%m = icmp slt <2 x i64> %mask, zeroinitializer
11151115
%a = and <2 x i64> %x, <i64 1099511627775, i64 1099511627775>
@@ -1123,7 +1123,7 @@ define <4 x i64> @ternlog_maskz_xor_and_mask_ymm(<4 x i64> %x, <4 x i64> %y, <4
11231123
; CHECK: ## %bb.0:
11241124
; CHECK-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm0, %ymm3
11251125
; CHECK-NEXT: vpsraq $63, %ymm2, %ymm0
1126-
; CHECK-NEXT: vpternlogq $96, %ymm1, %ymm3, %ymm0
1126+
; CHECK-NEXT: vpternlogq {{.*#+}} ymm0 = ymm0 & (ymm3 ^ ymm1)
11271127
; CHECK-NEXT: retq
11281128
%m = icmp slt <4 x i64> %mask, zeroinitializer
11291129
%a = and <4 x i64> %x, <i64 72057594037927935, i64 72057594037927935, i64 72057594037927935, i64 72057594037927935>
@@ -1317,7 +1317,7 @@ define <4 x i64> @ternlog_masky_xor_and_mask_ymm(<4 x i64> %x, <4 x i64> %y, <4
13171317
define <4 x i32> @ternlog_andn_or(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
13181318
; CHECK-LABEL: ternlog_andn_or:
13191319
; CHECK: ## %bb.0:
1320-
; CHECK-NEXT: vpternlogd $14, %xmm2, %xmm1, %xmm0
1320+
; CHECK-NEXT: vpternlogd {{.*#+}} xmm0 = ~xmm0 & (xmm1 | xmm2)
13211321
; CHECK-NEXT: retq
13221322
%a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
13231323
%b = or <4 x i32> %y, %z
@@ -1328,7 +1328,7 @@ define <4 x i32> @ternlog_andn_or(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
13281328
define <4 x i32> @ternlog_andn_or_2(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
13291329
; CHECK-LABEL: ternlog_andn_or_2:
13301330
; CHECK: ## %bb.0:
1331-
; CHECK-NEXT: vpternlogd $16, %xmm2, %xmm1, %xmm0
1331+
; CHECK-NEXT: vpternlogd {{.*#+}} xmm0 = xmm0 & ~(xmm1 | xmm2)
13321332
; CHECK-NEXT: retq
13331333
%a = or <4 x i32> %y, %z
13341334
%b = xor <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1>

‎llvm/test/CodeGen/X86/vec_smulo.ll

Lines changed: 17 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -139,7 +139,7 @@ define <2 x i32> @smulo_v2i32(<2 x i32> %a0, <2 x i32> %a1, ptr %p2) nounwind {
139139
; AVX512-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]
140140
; AVX512-NEXT: vpsrad $31, %xmm2, %xmm0
141141
; AVX512-NEXT: vpcmpeqd %xmm0, %xmm1, %xmm0
142-
; AVX512-NEXT: vpternlogq $15, %xmm0, %xmm0, %xmm0
142+
; AVX512-NEXT: vpternlogq {{.*#+}} xmm0 = ~xmm0
143143
; AVX512-NEXT: vmovq %xmm2, (%rdi)
144144
; AVX512-NEXT: retq
145145
%t = call {<2 x i32>, <2 x i1>} @llvm.smul.with.overflow.v2i32(<2 x i32> %a0, <2 x i32> %a1)
@@ -1234,7 +1234,7 @@ define <16 x i32> @smulo_v16i32(<16 x i32> %a0, <16 x i32> %a1, ptr %p2) nounwin
12341234
; AVX512-NEXT: vpmulld %zmm1, %zmm0, %zmm1
12351235
; AVX512-NEXT: vpsrad $31, %zmm1, %zmm0
12361236
; AVX512-NEXT: vpcmpneqd %zmm0, %zmm4, %k1
1237-
; AVX512-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
1237+
; AVX512-NEXT: vpternlogd {{.*#+}} zmm0 {%k1} {z} = -1
12381238
; AVX512-NEXT: vmovdqa64 %zmm1, (%rdi)
12391239
; AVX512-NEXT: retq
12401240
%t = call {<16 x i32>, <16 x i1>} @llvm.smul.with.overflow.v16i32(<16 x i32> %a0, <16 x i32> %a1)
@@ -1443,7 +1443,7 @@ define <16 x i32> @smulo_v16i8(<16 x i8> %a0, <16 x i8> %a1, ptr %p2) nounwind {
14431443
; AVX512F-NEXT: vpsraw $15, %ymm2, %ymm2
14441444
; AVX512F-NEXT: vpmovsxwd %ymm2, %zmm2
14451445
; AVX512F-NEXT: vpcmpneqd %zmm0, %zmm2, %k1
1446-
; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
1446+
; AVX512F-NEXT: vpternlogd {{.*#+}} zmm0 {%k1} {z} = -1
14471447
; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero
14481448
; AVX512F-NEXT: vpmovdb %zmm1, (%rdi)
14491449
; AVX512F-NEXT: retq
@@ -1457,7 +1457,7 @@ define <16 x i32> @smulo_v16i8(<16 x i8> %a0, <16 x i8> %a1, ptr %p2) nounwind {
14571457
; AVX512BW-NEXT: vpsllw $8, %ymm1, %ymm2
14581458
; AVX512BW-NEXT: vpsraw $15, %ymm2, %ymm2
14591459
; AVX512BW-NEXT: vpcmpneqw %ymm0, %ymm2, %k1
1460-
; AVX512BW-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
1460+
; AVX512BW-NEXT: vpternlogd {{.*#+}} zmm0 {%k1} {z} = -1
14611461
; AVX512BW-NEXT: vpmovwb %ymm1, (%rdi)
14621462
; AVX512BW-NEXT: retq
14631463
%t = call {<16 x i8>, <16 x i1>} @llvm.smul.with.overflow.v16i8(<16 x i8> %a0, <16 x i8> %a1)
@@ -1853,8 +1853,8 @@ define <32 x i32> @smulo_v32i8(<32 x i8> %a0, <32 x i8> %a1, ptr %p2) nounwind {
18531853
; AVX512F-NEXT: vpsraw $15, %ymm1, %ymm1
18541854
; AVX512F-NEXT: vpmovsxwd %ymm1, %zmm1
18551855
; AVX512F-NEXT: vpcmpneqd %zmm0, %zmm1, %k2
1856-
; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k2} {z}
1857-
; AVX512F-NEXT: vpternlogd $255, %zmm1, %zmm1, %zmm1 {%k1} {z}
1856+
; AVX512F-NEXT: vpternlogd {{.*#+}} zmm0 {%k2} {z} = -1
1857+
; AVX512F-NEXT: vpternlogd {{.*#+}} zmm1 {%k1} {z} = -1
18581858
; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm2 = ymm2[0],zero,ymm2[1],zero,ymm2[2],zero,ymm2[3],zero,ymm2[4],zero,ymm2[5],zero,ymm2[6],zero,ymm2[7],zero,ymm2[8],zero,ymm2[9],zero,ymm2[10],zero,ymm2[11],zero,ymm2[12],zero,ymm2[13],zero,ymm2[14],zero,ymm2[15],zero
18591859
; AVX512F-NEXT: vpmovdb %zmm2, 16(%rdi)
18601860
; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm2 = ymm3[0],zero,ymm3[1],zero,ymm3[2],zero,ymm3[3],zero,ymm3[4],zero,ymm3[5],zero,ymm3[6],zero,ymm3[7],zero,ymm3[8],zero,ymm3[9],zero,ymm3[10],zero,ymm3[11],zero,ymm3[12],zero,ymm3[13],zero,ymm3[14],zero,ymm3[15],zero
@@ -1870,9 +1870,9 @@ define <32 x i32> @smulo_v32i8(<32 x i8> %a0, <32 x i8> %a1, ptr %p2) nounwind {
18701870
; AVX512BW-NEXT: vpsllw $8, %zmm2, %zmm1
18711871
; AVX512BW-NEXT: vpsraw $15, %zmm1, %zmm1
18721872
; AVX512BW-NEXT: vpcmpneqw %zmm0, %zmm1, %k1
1873-
; AVX512BW-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
1873+
; AVX512BW-NEXT: vpternlogd {{.*#+}} zmm0 {%k1} {z} = -1
18741874
; AVX512BW-NEXT: kshiftrd $16, %k1, %k1
1875-
; AVX512BW-NEXT: vpternlogd $255, %zmm1, %zmm1, %zmm1 {%k1} {z}
1875+
; AVX512BW-NEXT: vpternlogd {{.*#+}} zmm1 {%k1} {z} = -1
18761876
; AVX512BW-NEXT: vpmovwb %zmm2, (%rdi)
18771877
; AVX512BW-NEXT: retq
18781878
%t = call {<32 x i8>, <32 x i1>} @llvm.smul.with.overflow.v32i8(<32 x i8> %a0, <32 x i8> %a1)
@@ -2637,10 +2637,10 @@ define <64 x i32> @smulo_v64i8(<64 x i8> %a0, <64 x i8> %a1, ptr %p2) nounwind {
26372637
; AVX512F-NEXT: vpsraw $15, %ymm1, %ymm1
26382638
; AVX512F-NEXT: vpmovsxwd %ymm1, %zmm1
26392639
; AVX512F-NEXT: vpcmpneqd %zmm0, %zmm1, %k4
2640-
; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k4} {z}
2641-
; AVX512F-NEXT: vpternlogd $255, %zmm1, %zmm1, %zmm1 {%k3} {z}
2642-
; AVX512F-NEXT: vpternlogd $255, %zmm2, %zmm2, %zmm2 {%k2} {z}
2643-
; AVX512F-NEXT: vpternlogd $255, %zmm3, %zmm3, %zmm3 {%k1} {z}
2640+
; AVX512F-NEXT: vpternlogd {{.*#+}} zmm0 {%k4} {z} = -1
2641+
; AVX512F-NEXT: vpternlogd {{.*#+}} zmm1 {%k3} {z} = -1
2642+
; AVX512F-NEXT: vpternlogd {{.*#+}} zmm2 {%k2} {z} = -1
2643+
; AVX512F-NEXT: vpternlogd {{.*#+}} zmm3 {%k1} {z} = -1
26442644
; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm4 = ymm4[0],zero,ymm4[1],zero,ymm4[2],zero,ymm4[3],zero,ymm4[4],zero,ymm4[5],zero,ymm4[6],zero,ymm4[7],zero,ymm4[8],zero,ymm4[9],zero,ymm4[10],zero,ymm4[11],zero,ymm4[12],zero,ymm4[13],zero,ymm4[14],zero,ymm4[15],zero
26452645
; AVX512F-NEXT: vpmovdb %zmm4, 48(%rdi)
26462646
; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm4 = ymm5[0],zero,ymm5[1],zero,ymm5[2],zero,ymm5[3],zero,ymm5[4],zero,ymm5[5],zero,ymm5[6],zero,ymm5[7],zero,ymm5[8],zero,ymm5[9],zero,ymm5[10],zero,ymm5[11],zero,ymm5[12],zero,ymm5[13],zero,ymm5[14],zero,ymm5[15],zero
@@ -2670,13 +2670,13 @@ define <64 x i32> @smulo_v64i8(<64 x i8> %a0, <64 x i8> %a1, ptr %p2) nounwind {
26702670
; AVX512BW-NEXT: vpmovb2m %zmm4, %k0
26712671
; AVX512BW-NEXT: vpmovm2b %k0, %zmm0
26722672
; AVX512BW-NEXT: vpcmpneqb %zmm1, %zmm0, %k1
2673-
; AVX512BW-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
2673+
; AVX512BW-NEXT: vpternlogd {{.*#+}} zmm0 {%k1} {z} = -1
26742674
; AVX512BW-NEXT: kshiftrd $16, %k1, %k2
2675-
; AVX512BW-NEXT: vpternlogd $255, %zmm1, %zmm1, %zmm1 {%k2} {z}
2675+
; AVX512BW-NEXT: vpternlogd {{.*#+}} zmm1 {%k2} {z} = -1
26762676
; AVX512BW-NEXT: kshiftrq $32, %k1, %k1
2677-
; AVX512BW-NEXT: vpternlogd $255, %zmm2, %zmm2, %zmm2 {%k1} {z}
2677+
; AVX512BW-NEXT: vpternlogd {{.*#+}} zmm2 {%k1} {z} = -1
26782678
; AVX512BW-NEXT: kshiftrd $16, %k1, %k1
2679-
; AVX512BW-NEXT: vpternlogd $255, %zmm3, %zmm3, %zmm3 {%k1} {z}
2679+
; AVX512BW-NEXT: vpternlogd {{.*#+}} zmm3 {%k1} {z} = -1
26802680
; AVX512BW-NEXT: vmovdqa64 %zmm4, (%rdi)
26812681
; AVX512BW-NEXT: retq
26822682
%t = call {<64 x i8>, <64 x i1>} @llvm.smul.with.overflow.v64i8(<64 x i8> %a0, <64 x i8> %a1)
@@ -2770,7 +2770,7 @@ define <8 x i32> @smulo_v8i16(<8 x i16> %a0, <8 x i16> %a1, ptr %p2) nounwind {
27702770
; AVX512F-NEXT: vpmullw %xmm1, %xmm0, %xmm1
27712771
; AVX512F-NEXT: vpsraw $15, %xmm1, %xmm0
27722772
; AVX512F-NEXT: vpcmpeqw %xmm0, %xmm2, %xmm0
2773-
; AVX512F-NEXT: vpternlogq $15, %xmm0, %xmm0, %xmm0
2773+
; AVX512F-NEXT: vpternlogq {{.*#+}} xmm0 = ~xmm0
27742774
; AVX512F-NEXT: vpmovsxwd %xmm0, %ymm0
27752775
; AVX512F-NEXT: vptestmd %ymm0, %ymm0, %k1
27762776
; AVX512F-NEXT: vpcmpeqd %ymm0, %ymm0, %ymm0

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