Add RISC-V support information to readme

Author: AnastasiyaChernikova

llvm/docs/CommandGuide/llvm-exegesis.rst

@@ -34,8 +34,8 @@ SUPPORTED PLATFORMS
 -------------------
 
 :program:`llvm-exegesis` currently only supports X86 (64-bit only), ARM
-(AArch64 only, snippet generation is sparse), MIPS, and PowerPC (PowerPC64LE
-only) on Linux for benchmarking. Not all benchmarking functionality is
+(AArch64 only, snippet generation is sparse), MIPS, PowerPC (PowerPC64LE
+only) and RISC-V (RV64I/E and RV32I/E) on Linux for benchmarking. Not all benchmarking functionality is
 guaranteed to work on every platform. :program:`llvm-exegesis` also has a
 separate analysis mode that is supported on every platform that LLVM is.
 

llvm/tools/llvm-exegesis/README.md

@@ -32,6 +32,8 @@ architectures:
     e.g. pseudo instructions and most register classes are not supported.
 * MIPS
 * PowerPC (PowerPC64LE only)
+* RISC-V
+  * RV64I/E, RV32I/E and extensions supported by LLVM's RISC-V backend with some limitations.
 
 Note that not all benchmarking functionality is guaranteed to work on all platforms.