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[RISCV] Use Align(8) for the stack temporary created for SPLAT_VECTOR_SPLIT_I64_VL.
The value needs to be read as an 8 byte vector element which requires the pointer to be 8 byte aligned according to the vector spec. Fixes #71787
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-4
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2 files changed

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llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -92,7 +92,7 @@ void RISCVDAGToDAGISel::PreprocessISelDAG() {
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// Create temporary stack for each expanding node.
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SDValue StackSlot =
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CurDAG->CreateStackTemporary(TypeSize::Fixed(8), Align(4));
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CurDAG->CreateStackTemporary(TypeSize::Fixed(8), Align(8));
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int FI = cast<FrameIndexSDNode>(StackSlot.getNode())->getIndex();
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MachinePointerInfo MPI = MachinePointerInfo::getFixedStack(MF, FI);
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llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -75,9 +75,9 @@ define i64 @ctz_nxv8i1_no_range(<vscale x 8 x i16> %a) {
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; RV32-NEXT: li a1, 0
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; RV32-NEXT: li a3, 0
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; RV32-NEXT: call __muldi3@plt
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; RV32-NEXT: sw a1, 24(sp)
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; RV32-NEXT: sw a0, 20(sp)
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; RV32-NEXT: addi a2, sp, 20
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; RV32-NEXT: sw a1, 20(sp)
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; RV32-NEXT: sw a0, 16(sp)
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; RV32-NEXT: addi a2, sp, 16
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; RV32-NEXT: vsetvli a3, zero, e64, m8, ta, ma
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; RV32-NEXT: vlse64.v v16, (a2), zero
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; RV32-NEXT: vid.v v8

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