Massage memory_clause.ll so that offsets are still generated

Author: ritter-x2a

llvm/test/CodeGen/AMDGPU/memory_clause.ll

@@ -208,45 +208,36 @@ define void @mubuf_clause(ptr addrspace(5) noalias nocapture readonly %arg, ptr
 ; GCN-SCRATCH-NEXT:    v_lshlrev_b32_e32 v2, 4, v31
 ; GCN-SCRATCH-NEXT:    v_and_b32_e32 v18, 0x3ff0, v2
 ; GCN-SCRATCH-NEXT:    v_add_nc_u32_e32 v0, v0, v18
-; GCN-SCRATCH-NEXT:    v_add_nc_u32_e32 v6, 16, v0
-; GCN-SCRATCH-NEXT:    v_add_nc_u32_e32 v10, 32, v0
-; GCN-SCRATCH-NEXT:    v_add_nc_u32_e32 v14, 48, v0
 ; GCN-SCRATCH-NEXT:    s_clause 0x3
 ; GCN-SCRATCH-NEXT:    scratch_load_dwordx4 v[2:5], v0, off
-; GCN-SCRATCH-NEXT:    scratch_load_dwordx4 v[6:9], v6, off
-; GCN-SCRATCH-NEXT:    scratch_load_dwordx4 v[10:13], v10, off
-; GCN-SCRATCH-NEXT:    scratch_load_dwordx4 v[14:17], v14, off
+; GCN-SCRATCH-NEXT:    scratch_load_dwordx4 v[6:9], v0, off offset:16
+; GCN-SCRATCH-NEXT:    scratch_load_dwordx4 v[10:13], v0, off offset:32
+; GCN-SCRATCH-NEXT:    scratch_load_dwordx4 v[14:17], v0, off offset:48
 ; GCN-SCRATCH-NEXT:    v_add_nc_u32_e32 v0, v1, v18
-; GCN-SCRATCH-NEXT:    v_add_nc_u32_e32 v1, 16, v0
-; GCN-SCRATCH-NEXT:    v_add_nc_u32_e32 v18, 32, v0
-; GCN-SCRATCH-NEXT:    v_add_nc_u32_e32 v19, 48, v0
 ; GCN-SCRATCH-NEXT:    s_waitcnt vmcnt(3)
 ; GCN-SCRATCH-NEXT:    scratch_store_dwordx4 v0, v[2:5], off
 ; GCN-SCRATCH-NEXT:    s_waitcnt vmcnt(2)
-; GCN-SCRATCH-NEXT:    scratch_store_dwordx4 v1, v[6:9], off
+; GCN-SCRATCH-NEXT:    scratch_store_dwordx4 v0, v[6:9], off offset:16
 ; GCN-SCRATCH-NEXT:    s_waitcnt vmcnt(1)
-; GCN-SCRATCH-NEXT:    scratch_store_dwordx4 v18, v[10:13], off
+; GCN-SCRATCH-NEXT:    scratch_store_dwordx4 v0, v[10:13], off offset:32
 ; GCN-SCRATCH-NEXT:    s_waitcnt vmcnt(0)
-; GCN-SCRATCH-NEXT:    scratch_store_dwordx4 v19, v[14:17], off
+; GCN-SCRATCH-NEXT:    scratch_store_dwordx4 v0, v[14:17], off offset:48
 ; GCN-SCRATCH-NEXT:    s_setpc_b64 s[30:31]
 bb:
   %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
-  %tmp2 = getelementptr inbounds <4 x i32>, ptr addrspace(5) %arg, i32 %tmp
-  %tmp3 = load <4 x i32>, ptr addrspace(5) %tmp2, align 16
-  %tmp4 = getelementptr inbounds <4 x i32>, ptr addrspace(5) %arg1, i32 %tmp
-  %tmp5 = add nuw nsw i32 %tmp, 1
-  %tmp6 = getelementptr inbounds <4 x i32>, ptr addrspace(5) %arg, i32 %tmp5
+  %base = getelementptr inbounds <4 x i32>, ptr addrspace(5) %arg, i32 %tmp
+  %tmp3 = load <4 x i32>, ptr addrspace(5) %base, align 16
+  %base1 = getelementptr inbounds <4 x i32>, ptr addrspace(5) %arg1, i32 %tmp
+  %tmp6 = getelementptr inbounds <4 x i32>, ptr addrspace(5) %base, i32 1
   %tmp7 = load <4 x i32>, ptr addrspace(5) %tmp6, align 16
-  %tmp8 = getelementptr inbounds <4 x i32>, ptr addrspace(5) %arg1, i32 %tmp5
-  %tmp9 = add nuw nsw i32 %tmp, 2
-  %tmp10 = getelementptr inbounds <4 x i32>, ptr addrspace(5) %arg, i32 %tmp9
+  %tmp8 = getelementptr inbounds <4 x i32>, ptr addrspace(5) %base1, i32 1
+  %tmp10 = getelementptr inbounds <4 x i32>, ptr addrspace(5) %base, i32 2
   %tmp11 = load <4 x i32>, ptr addrspace(5) %tmp10, align 16
-  %tmp12 = getelementptr inbounds <4 x i32>, ptr addrspace(5) %arg1, i32 %tmp9
-  %tmp13 = add nuw nsw i32 %tmp, 3
-  %tmp14 = getelementptr inbounds <4 x i32>, ptr addrspace(5) %arg, i32 %tmp13
+  %tmp12 = getelementptr inbounds <4 x i32>, ptr addrspace(5) %base1, i32 2
+  %tmp14 = getelementptr inbounds <4 x i32>, ptr addrspace(5) %base, i32 3
   %tmp15 = load <4 x i32>, ptr addrspace(5) %tmp14, align 16
-  %tmp16 = getelementptr inbounds <4 x i32>, ptr addrspace(5) %arg1, i32 %tmp13
-  store <4 x i32> %tmp3, ptr addrspace(5) %tmp4, align 16
+  %tmp16 = getelementptr inbounds <4 x i32>, ptr addrspace(5) %base1, i32 3
+  store <4 x i32> %tmp3, ptr addrspace(5) %base1, align 16
   store <4 x i32> %tmp7, ptr addrspace(5) %tmp8, align 16
   store <4 x i32> %tmp11, ptr addrspace(5) %tmp12, align 16
   store <4 x i32> %tmp15, ptr addrspace(5) %tmp16, align 16