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| 1 | +; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s --spirv-ext=+SPV_KHR_bit_instructions -o - | FileCheck %s --check-prefix=CHECK-EXTENSION |
| 2 | +; RUN: not llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o %t.spvt 2>&1 | FileCheck %s --check-prefix=CHECK-NO-EXTENSION |
| 3 | +; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s --spirv-ext=+SPV_KHR_bit_instructions -o - -filetype=obj | spirv-val %} |
| 4 | +; |
| 5 | +; CHECK-EXTENSION: Capability BitInstructions |
| 6 | +; CHECK-EXTENSION: Extension "SPV_KHR_bit_instructions" |
| 7 | +; CHECK-NO-EXTENSION: LLVM ERROR: __spirv_BitFieldInsert: the builtin requires the following SPIR-V extension: SPV_KHR_bit_instructions |
| 8 | + |
| 9 | +; Test SPIRV-friendly builtins. |
| 10 | +; CHECK-EXTENSION: %[[#]] = OpFunction %[[#]] None %[[#]] |
| 11 | +; CHECK-EXTENSION: %[[#insertbase_int2:]] = OpFunctionParameter %[[#]] |
| 12 | +; CHECK-EXTENSION: %[[#insertinsert_int2:]] = OpFunctionParameter %[[#]] |
| 13 | +; CHECK-EXTENSION: %[[#]] = OpBitFieldInsert %[[#]] %[[#insertbase_int2]] %[[#insertinsert_int2]] |
| 14 | +; OpenCL equivalent. |
| 15 | +; kernel void testInsert_SPIRVFriendly(int2 b, int2 i, global int2 *res) { |
| 16 | +; *res = bitfield_insert(b, i, 4, 2); |
| 17 | +; } |
| 18 | +define spir_kernel void @testInsert_SPIRVFriendly(<2 x i32> %b, <2 x i32> %i, ptr addrspace(1) nocapture align 8 %res) #3 { |
| 19 | +entry: |
| 20 | + %call = call spir_func <2 x i32> @_Z22__spirv_BitFieldInsertDv2_iS_jj(<2 x i32> %b, <2 x i32> %i, i32 4, i32 2) #3 |
| 21 | + store <2 x i32> %call, ptr addrspace(1) %res, align 8 |
| 22 | + ret void |
| 23 | +} |
| 24 | + |
| 25 | +declare spir_func <2 x i32> @_Z22__spirv_BitFieldInsertDv2_iS_jj(<2 x i32>, <2 x i32>, i32, i32) #3 |
| 26 | + |
| 27 | + |
| 28 | +; CHECK-EXTENSION: %[[#]] = OpFunction %[[#]] None %[[#]] |
| 29 | +; CHECK-EXTENSION: %[[#sextractbase:]] = OpFunctionParameter %[[#]] |
| 30 | +; CHECK-EXTENSION: %[[#sextractbaseu:]] = OpFunctionParameter %[[#]] |
| 31 | +; CHECK-EXTENSION: %[[#]] = OpBitFieldSExtract %[[#]] %[[#sextractbase]] |
| 32 | +; CHECK-EXTENSION: %[[#]] = OpBitFieldSExtract %[[#]] %[[#sextractbaseu]] |
| 33 | +; OpenCL equivalent. |
| 34 | +; kernel void testExtractS_SPIRVFriendly(short b, ushort bu, global short *res) { |
| 35 | +; *res = bitfield_extract_signed(b, 5, 4); |
| 36 | +; *res += bitfield_extract_signed(bu, 5, 4); |
| 37 | +; } |
| 38 | +define spir_kernel void @testExtractS_SPIRVFriendly(i16 signext %b, i16 zeroext %bu, ptr addrspace(1) nocapture align 2 %res) #3 { |
| 39 | +entry: |
| 40 | + %call = call spir_func i16 @_Z24__spirv_BitFieldSExtractsjj(i16 %b, i32 5, i32 4) #3 |
| 41 | + %call1 = call spir_func i16 @_Z24__spirv_BitFieldSExtractsjj(i16 %bu, i32 5, i32 4) #3 |
| 42 | + %add = add i16 %call1, %call |
| 43 | + store i16 %add, ptr addrspace(1) %res, align 2 |
| 44 | + ret void |
| 45 | +} |
| 46 | + |
| 47 | +declare spir_func i16 @_Z24__spirv_BitFieldSExtractsjj(i16, i32, i32) #3 |
| 48 | + |
| 49 | +; CHECK-EXTENSION: %[[#]] = OpFunction %[[#]] None %[[#]] |
| 50 | +; CHECK-EXTENSION: %[[#uextractbase:]] = OpFunctionParameter %[[#]] |
| 51 | +; CHECK-EXTENSION: %[[#uextractbaseu:]] = OpFunctionParameter %[[#]] |
| 52 | +; CHECK-EXTENSION: %[[#]] = OpBitFieldUExtract %[[#]] %[[#uextractbase]] |
| 53 | +; CHECK-EXTENSION: %[[#]] = OpBitFieldUExtract %[[#]] %[[#uextractbaseu]] |
| 54 | +; OpenCL equivalent. |
| 55 | +; kernel void testExtractU_SPIRVFriendly(char8 b, uchar8 bu, global uchar8 *res) { |
| 56 | +; *res = bitfield_extract_unsigned(b, 3, 4); |
| 57 | +; *res += bitfield_extract_unsigned(bu, 3, 4); |
| 58 | +; } |
| 59 | +define spir_kernel void @testExtractU_SPIRVFriendly(<8 x i8> %b, <8 x i8> %bu, ptr addrspace(1) nocapture align 8 %res) #3 { |
| 60 | +entry: |
| 61 | + %call = call spir_func <8 x i8> @_Z24__spirv_BitFieldUExtractDv8_hjj(<8 x i8> %b, i32 3, i32 4) #3 |
| 62 | + %call1 = call spir_func <8 x i8> @_Z24__spirv_BitFieldUExtractDv8_hjj(<8 x i8> %bu, i32 3, i32 4) #3 |
| 63 | + %add = add <8 x i8> %call1, %call |
| 64 | + store <8 x i8> %add, ptr addrspace(1) %res, align 8 |
| 65 | + ret void |
| 66 | +} |
| 67 | + |
| 68 | +declare spir_func <8 x i8> @_Z24__spirv_BitFieldUExtractDv8_hjj(<8 x i8>, i32, i32) #3 |
| 69 | + |
| 70 | +; CHECK-EXTENSION: %[[#]] = OpFunction %[[#]] None %[[#]] |
| 71 | +; CHECK-EXTENSION: %[[#reversebase:]] = OpFunctionParameter %[[#]] |
| 72 | +; CHECK-EXTENSION: %[[#]] = OpBitReverse %[[#]] %[[#reversebase]] |
| 73 | +; OpenCL equivalent. |
| 74 | +; kernel void testBitReverse_SPIRVFriendly(long4 b, global long4 *res) { |
| 75 | +; *res = bit_reverse(b); |
| 76 | +; } |
| 77 | +define spir_kernel void @testBitReverse_SPIRVFriendly(<4 x i64> %b, ptr addrspace(1) nocapture align 32 %res) #3 { |
| 78 | +entry: |
| 79 | + %call = call <4 x i64> @llvm.bitreverse.v4i64(<4 x i64> %b) |
| 80 | + store <4 x i64> %call, ptr addrspace(1) %res, align 32 |
| 81 | + ret void |
| 82 | +} |
| 83 | + |
| 84 | +declare <4 x i64> @llvm.bitreverse.v4i64(<4 x i64>) #4 |
| 85 | + |
| 86 | + |
| 87 | + |
| 88 | +attributes #3 = { nounwind } |
| 89 | +attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } |
| 90 | + |
| 91 | +!llvm.module.flags = !{!0} |
| 92 | +!opencl.ocl.version = !{!1} |
| 93 | +!opencl.spir.version = !{!1} |
| 94 | +!llvm.ident = !{!2} |
| 95 | + |
| 96 | +!0 = !{i32 1, !"wchar_size", i32 4} |
| 97 | +!1 = !{i32 2, i32 0} |
| 98 | +!2 = !{!"clang version 20.0.0git (https://github.com/llvm/llvm-project.git cc61409d353a40f62d3a137f3c7436aa00df779d)"} |
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