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Spin off SPIRV-friendly builtins test.
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llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions/cl_khr_extended_bit_ops.ll

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Original file line numberDiff line numberDiff line change
@@ -2743,90 +2743,7 @@ entry:
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declare spir_func <16 x i8> @_Z11bit_reverseDv16_h(<16 x i8> noundef)
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2746-
; Test SPIRV-friendly builtins.
2747-
; CHECK-EXTENSION: %[[#]] = OpFunction %[[#]] None %[[#]]
2748-
; CHECK-EXTENSION: %[[#insertbase_int2:]] = OpFunctionParameter %[[#]]
2749-
; CHECK-EXTENSION: %[[#insertinsert_int2:]] = OpFunctionParameter %[[#]]
2750-
; CHECK-EXTENSION: %[[#]] = OpBitFieldInsert %[[#]] %[[#insertbase_int2]] %[[#insertinsert_int2]]
2751-
; OpenCL equivalent.
2752-
; kernel void testInsert_SPIRVFriendly(int2 b, int2 i, global int2 *res) {
2753-
; *res = bitfield_insert(b, i, 4, 2);
2754-
; }
2755-
define spir_kernel void @testInsert_SPIRVFriendly(<2 x i32> %b, <2 x i32> %i, ptr addrspace(1) nocapture align 8 %res) #3 {
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entry:
2757-
%call = call spir_func <2 x i32> @_Z22__spirv_BitFieldInsertDv2_iS_jj(<2 x i32> %b, <2 x i32> %i, i32 4, i32 2) #3
2758-
store <2 x i32> %call, ptr addrspace(1) %res, align 8
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ret void
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}
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2762-
declare spir_func <2 x i32> @_Z22__spirv_BitFieldInsertDv2_iS_jj(<2 x i32>, <2 x i32>, i32, i32) #3
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; CHECK-EXTENSION: %[[#]] = OpFunction %[[#]] None %[[#]]
2766-
; CHECK-EXTENSION: %[[#sextractbase:]] = OpFunctionParameter %[[#]]
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; CHECK-EXTENSION: %[[#sextractbaseu:]] = OpFunctionParameter %[[#]]
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; CHECK-EXTENSION: %[[#]] = OpBitFieldSExtract %[[#]] %[[#sextractbase]]
2769-
; CHECK-EXTENSION: %[[#]] = OpBitFieldSExtract %[[#]] %[[#sextractbaseu]]
2770-
; OpenCL equivalent.
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; kernel void testExtractS_SPIRVFriendly(short b, ushort bu, global short *res) {
2772-
; *res = bitfield_extract_signed(b, 5, 4);
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; *res += bitfield_extract_signed(bu, 5, 4);
2774-
; }
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define spir_kernel void @testExtractS_SPIRVFriendly(i16 signext %b, i16 zeroext %bu, ptr addrspace(1) nocapture align 2 %res) #3 {
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entry:
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%call = call spir_func i16 @_Z24__spirv_BitFieldSExtractsjj(i16 %b, i32 5, i32 4) #3
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%call1 = call spir_func i16 @_Z24__spirv_BitFieldSExtractsjj(i16 %bu, i32 5, i32 4) #3
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%add = add i16 %call1, %call
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store i16 %add, ptr addrspace(1) %res, align 2
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ret void
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}
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declare spir_func i16 @_Z24__spirv_BitFieldSExtractsjj(i16, i32, i32) #3
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; CHECK-EXTENSION: %[[#]] = OpFunction %[[#]] None %[[#]]
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; CHECK-EXTENSION: %[[#uextractbase:]] = OpFunctionParameter %[[#]]
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; CHECK-EXTENSION: %[[#uextractbaseu:]] = OpFunctionParameter %[[#]]
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; CHECK-EXTENSION: %[[#]] = OpBitFieldUExtract %[[#]] %[[#uextractbase]]
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; CHECK-EXTENSION: %[[#]] = OpBitFieldUExtract %[[#]] %[[#uextractbaseu]]
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; OpenCL equivalent.
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; kernel void testExtractU_SPIRVFriendly(char8 b, uchar8 bu, global uchar8 *res) {
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; *res = bitfield_extract_unsigned(b, 3, 4);
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; *res += bitfield_extract_unsigned(bu, 3, 4);
2795-
; }
2796-
define spir_kernel void @testExtractU_SPIRVFriendly(<8 x i8> %b, <8 x i8> %bu, ptr addrspace(1) nocapture align 8 %res) #3 {
2797-
entry:
2798-
%call = call spir_func <8 x i8> @_Z24__spirv_BitFieldUExtractDv8_hjj(<8 x i8> %b, i32 3, i32 4) #3
2799-
%call1 = call spir_func <8 x i8> @_Z24__spirv_BitFieldUExtractDv8_hjj(<8 x i8> %bu, i32 3, i32 4) #3
2800-
%add = add <8 x i8> %call1, %call
2801-
store <8 x i8> %add, ptr addrspace(1) %res, align 8
2802-
ret void
2803-
}
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2805-
declare spir_func <8 x i8> @_Z24__spirv_BitFieldUExtractDv8_hjj(<8 x i8>, i32, i32) #3
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; CHECK-EXTENSION: %[[#]] = OpFunction %[[#]] None %[[#]]
2808-
; CHECK-EXTENSION: %[[#reversebase:]] = OpFunctionParameter %[[#]]
2809-
; CHECK-EXTENSION: %[[#]] = OpBitReverse %[[#]] %[[#reversebase]]
2810-
; OpenCL equivalent.
2811-
; kernel void testBitReverse_SPIRVFriendly(long4 b, global long4 *res) {
2812-
; *res = bit_reverse(b);
2813-
; }
2814-
define spir_kernel void @testBitReverse_SPIRVFriendly(<4 x i64> %b, ptr addrspace(1) nocapture align 32 %res) #3 {
2815-
entry:
2816-
%call = call <4 x i64> @llvm.bitreverse.v4i64(<4 x i64> %b)
2817-
store <4 x i64> %call, ptr addrspace(1) %res, align 32
2818-
ret void
2819-
}
2820-
2821-
declare <4 x i64> @llvm.bitreverse.v4i64(<4 x i64>) #4
2822-
2823-
2824-
2825-
attributes #0 = { convergent mustprogress nofree norecurse nounwind willreturn memory(argmem: write) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "uniform-work-group-size"="false" }
2826-
attributes #1 = { convergent mustprogress nofree nounwind willreturn memory(none) "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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attributes #2 = { convergent nounwind willreturn memory(none) }
2828-
attributes #3 = { nounwind }
2829-
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
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!llvm.module.flags = !{!0}
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!opencl.ocl.version = !{!1}
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@@ -0,0 +1,98 @@
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; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s --spirv-ext=+SPV_KHR_bit_instructions -o - | FileCheck %s --check-prefix=CHECK-EXTENSION
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; RUN: not llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o %t.spvt 2>&1 | FileCheck %s --check-prefix=CHECK-NO-EXTENSION
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s --spirv-ext=+SPV_KHR_bit_instructions -o - -filetype=obj | spirv-val %}
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;
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; CHECK-EXTENSION: Capability BitInstructions
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; CHECK-EXTENSION: Extension "SPV_KHR_bit_instructions"
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; CHECK-NO-EXTENSION: LLVM ERROR: __spirv_BitFieldInsert: the builtin requires the following SPIR-V extension: SPV_KHR_bit_instructions
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; Test SPIRV-friendly builtins.
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; CHECK-EXTENSION: %[[#]] = OpFunction %[[#]] None %[[#]]
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; CHECK-EXTENSION: %[[#insertbase_int2:]] = OpFunctionParameter %[[#]]
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; CHECK-EXTENSION: %[[#insertinsert_int2:]] = OpFunctionParameter %[[#]]
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; CHECK-EXTENSION: %[[#]] = OpBitFieldInsert %[[#]] %[[#insertbase_int2]] %[[#insertinsert_int2]]
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; OpenCL equivalent.
15+
; kernel void testInsert_SPIRVFriendly(int2 b, int2 i, global int2 *res) {
16+
; *res = bitfield_insert(b, i, 4, 2);
17+
; }
18+
define spir_kernel void @testInsert_SPIRVFriendly(<2 x i32> %b, <2 x i32> %i, ptr addrspace(1) nocapture align 8 %res) #3 {
19+
entry:
20+
%call = call spir_func <2 x i32> @_Z22__spirv_BitFieldInsertDv2_iS_jj(<2 x i32> %b, <2 x i32> %i, i32 4, i32 2) #3
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store <2 x i32> %call, ptr addrspace(1) %res, align 8
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ret void
23+
}
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25+
declare spir_func <2 x i32> @_Z22__spirv_BitFieldInsertDv2_iS_jj(<2 x i32>, <2 x i32>, i32, i32) #3
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; CHECK-EXTENSION: %[[#]] = OpFunction %[[#]] None %[[#]]
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; CHECK-EXTENSION: %[[#sextractbase:]] = OpFunctionParameter %[[#]]
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; CHECK-EXTENSION: %[[#sextractbaseu:]] = OpFunctionParameter %[[#]]
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; CHECK-EXTENSION: %[[#]] = OpBitFieldSExtract %[[#]] %[[#sextractbase]]
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; CHECK-EXTENSION: %[[#]] = OpBitFieldSExtract %[[#]] %[[#sextractbaseu]]
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; OpenCL equivalent.
34+
; kernel void testExtractS_SPIRVFriendly(short b, ushort bu, global short *res) {
35+
; *res = bitfield_extract_signed(b, 5, 4);
36+
; *res += bitfield_extract_signed(bu, 5, 4);
37+
; }
38+
define spir_kernel void @testExtractS_SPIRVFriendly(i16 signext %b, i16 zeroext %bu, ptr addrspace(1) nocapture align 2 %res) #3 {
39+
entry:
40+
%call = call spir_func i16 @_Z24__spirv_BitFieldSExtractsjj(i16 %b, i32 5, i32 4) #3
41+
%call1 = call spir_func i16 @_Z24__spirv_BitFieldSExtractsjj(i16 %bu, i32 5, i32 4) #3
42+
%add = add i16 %call1, %call
43+
store i16 %add, ptr addrspace(1) %res, align 2
44+
ret void
45+
}
46+
47+
declare spir_func i16 @_Z24__spirv_BitFieldSExtractsjj(i16, i32, i32) #3
48+
49+
; CHECK-EXTENSION: %[[#]] = OpFunction %[[#]] None %[[#]]
50+
; CHECK-EXTENSION: %[[#uextractbase:]] = OpFunctionParameter %[[#]]
51+
; CHECK-EXTENSION: %[[#uextractbaseu:]] = OpFunctionParameter %[[#]]
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; CHECK-EXTENSION: %[[#]] = OpBitFieldUExtract %[[#]] %[[#uextractbase]]
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; CHECK-EXTENSION: %[[#]] = OpBitFieldUExtract %[[#]] %[[#uextractbaseu]]
54+
; OpenCL equivalent.
55+
; kernel void testExtractU_SPIRVFriendly(char8 b, uchar8 bu, global uchar8 *res) {
56+
; *res = bitfield_extract_unsigned(b, 3, 4);
57+
; *res += bitfield_extract_unsigned(bu, 3, 4);
58+
; }
59+
define spir_kernel void @testExtractU_SPIRVFriendly(<8 x i8> %b, <8 x i8> %bu, ptr addrspace(1) nocapture align 8 %res) #3 {
60+
entry:
61+
%call = call spir_func <8 x i8> @_Z24__spirv_BitFieldUExtractDv8_hjj(<8 x i8> %b, i32 3, i32 4) #3
62+
%call1 = call spir_func <8 x i8> @_Z24__spirv_BitFieldUExtractDv8_hjj(<8 x i8> %bu, i32 3, i32 4) #3
63+
%add = add <8 x i8> %call1, %call
64+
store <8 x i8> %add, ptr addrspace(1) %res, align 8
65+
ret void
66+
}
67+
68+
declare spir_func <8 x i8> @_Z24__spirv_BitFieldUExtractDv8_hjj(<8 x i8>, i32, i32) #3
69+
70+
; CHECK-EXTENSION: %[[#]] = OpFunction %[[#]] None %[[#]]
71+
; CHECK-EXTENSION: %[[#reversebase:]] = OpFunctionParameter %[[#]]
72+
; CHECK-EXTENSION: %[[#]] = OpBitReverse %[[#]] %[[#reversebase]]
73+
; OpenCL equivalent.
74+
; kernel void testBitReverse_SPIRVFriendly(long4 b, global long4 *res) {
75+
; *res = bit_reverse(b);
76+
; }
77+
define spir_kernel void @testBitReverse_SPIRVFriendly(<4 x i64> %b, ptr addrspace(1) nocapture align 32 %res) #3 {
78+
entry:
79+
%call = call <4 x i64> @llvm.bitreverse.v4i64(<4 x i64> %b)
80+
store <4 x i64> %call, ptr addrspace(1) %res, align 32
81+
ret void
82+
}
83+
84+
declare <4 x i64> @llvm.bitreverse.v4i64(<4 x i64>) #4
85+
86+
87+
88+
attributes #3 = { nounwind }
89+
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
90+
91+
!llvm.module.flags = !{!0}
92+
!opencl.ocl.version = !{!1}
93+
!opencl.spir.version = !{!1}
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!llvm.ident = !{!2}
95+
96+
!0 = !{i32 1, !"wchar_size", i32 4}
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!1 = !{i32 2, i32 0}
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!2 = !{!"clang version 20.0.0git (https://github.com/llvm/llvm-project.git cc61409d353a40f62d3a137f3c7436aa00df779d)"}

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