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[CodeGen][LLVM] Make the va_list related intrinsics generic. (#85460)
Currently, the builtins used for implementing `va_list` handling unconditionally take their arguments as unqualified `ptr`s i.e. pointers to AS 0. This does not work for targets where the default AS is not 0 or AS 0 is not a viable AS (for example, a target might choose 0 to represent the constant address space). This patch changes the builtins' signature to take generic `anyptr` args, which corrects this issue. It is noisy due to the number of tests affected. A test for an upstream target which does not use 0 as its default AS (SPIRV for HIP device compilations) is added as well.
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‎clang/lib/CodeGen/CGBuiltin.cpp

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -792,7 +792,8 @@ EncompassingIntegerType(ArrayRef<struct WidthAndSignedness> Types) {
792792

793793
Value *CodeGenFunction::EmitVAStartEnd(Value *ArgValue, bool IsStart) {
794794
Intrinsic::ID inst = IsStart ? Intrinsic::vastart : Intrinsic::vaend;
795-
return Builder.CreateCall(CGM.getIntrinsic(inst), ArgValue);
795+
return Builder.CreateCall(CGM.getIntrinsic(inst, {ArgValue->getType()}),
796+
ArgValue);
796797
}
797798

798799
/// Checks if using the result of __builtin_object_size(p, @p From) in place of
@@ -3018,7 +3019,8 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID,
30183019
case Builtin::BI__builtin_va_copy: {
30193020
Value *DstPtr = EmitVAListRef(E->getArg(0)).getPointer();
30203021
Value *SrcPtr = EmitVAListRef(E->getArg(1)).getPointer();
3021-
Builder.CreateCall(CGM.getIntrinsic(Intrinsic::vacopy), {DstPtr, SrcPtr});
3022+
Builder.CreateCall(CGM.getIntrinsic(Intrinsic::vacopy, {DstPtr->getType()}),
3023+
{DstPtr, SrcPtr});
30223024
return RValue::get(nullptr);
30233025
}
30243026
case Builtin::BIabs:

‎clang/test/CodeGen/CSKY/csky-abi.c

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -185,13 +185,13 @@ void f_va_caller(void) {
185185
// CHECK: [[VA:%.*]] = alloca ptr, align 4
186186
// CHECK: [[V:%.*]] = alloca i32, align 4
187187
// CHECK: store ptr %fmt, ptr [[FMT_ADDR]], align 4
188-
// CHECK: call void @llvm.va_start(ptr [[VA]])
188+
// CHECK: call void @llvm.va_start.p0(ptr [[VA]])
189189
// CHECK: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
190190
// CHECK: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 4
191191
// CHECK: store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
192192
// CHECK: [[TMP1:%.*]] = load i32, ptr [[ARGP_CUR]], align 4
193193
// CHECK: store i32 [[TMP1]], ptr [[V]], align 4
194-
// CHECK: call void @llvm.va_end(ptr [[VA]])
194+
// CHECK: call void @llvm.va_end.p0(ptr [[VA]])
195195
// CHECK: [[TMP2:%.*]] = load i32, ptr [[V]], align 4
196196
// CHECK: ret i32 [[TMP2]]
197197
// CHECK: }
@@ -210,13 +210,13 @@ int f_va_1(char *fmt, ...) {
210210
// CHECK-NEXT: [[VA:%.*]] = alloca ptr, align 4
211211
// CHECK-NEXT: [[V:%.*]] = alloca double, align 4
212212
// CHECK-NEXT: store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 4
213-
// CHECK-NEXT: call void @llvm.va_start(ptr [[VA]])
213+
// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])
214214
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
215215
// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 8
216216
// CHECK-NEXT: store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
217217
// CHECK-NEXT: [[TMP4:%.*]] = load double, ptr [[ARGP_CUR]], align 4
218218
// CHECK-NEXT: store double [[TMP4]], ptr [[V]], align 4
219-
// CHECK-NEXT: call void @llvm.va_end(ptr [[VA]])
219+
// CHECK-NEXT: call void @llvm.va_end.p0(ptr [[VA]])
220220
// CHECK-NEXT: [[TMP5:%.*]] = load double, ptr [[V]], align 4
221221
// CHECK-NEXT: ret double [[TMP5]]
222222
double f_va_2(char *fmt, ...) {
@@ -236,7 +236,7 @@ double f_va_2(char *fmt, ...) {
236236
// CHECK-NEXT: [[W:%.*]] = alloca i32, align 4
237237
// CHECK-NEXT: [[X:%.*]] = alloca double, align 4
238238
// CHECK-NEXT: store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 4
239-
// CHECK-NEXT: call void @llvm.va_start(ptr [[VA]])
239+
// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])
240240
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
241241
// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 8
242242
// CHECK-NEXT: store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
@@ -252,7 +252,7 @@ double f_va_2(char *fmt, ...) {
252252
// CHECK-NEXT: store ptr [[ARGP_NEXT5]], ptr [[VA]], align 4
253253
// CHECK-NEXT: [[TMP11:%.*]] = load double, ptr [[ARGP_CUR4]], align 4
254254
// CHECK-NEXT: store double [[TMP11]], ptr [[X]], align 4
255-
// CHECK-NEXT: call void @llvm.va_end(ptr [[VA]])
255+
// CHECK-NEXT: call void @llvm.va_end.p0(ptr [[VA]])
256256
// CHECK-NEXT: [[TMP12:%.*]] = load double, ptr [[V]], align 4
257257
// CHECK-NEXT: [[TMP13:%.*]] = load double, ptr [[X]], align 4
258258
// CHECK-NEXT: [[ADD:%.*]] = fadd double [[TMP12]], [[TMP13]]
@@ -279,7 +279,7 @@ double f_va_3(char *fmt, ...) {
279279
// CHECK-NEXT: [[LS:%.*]] = alloca [[STRUCT_LARGE:%.*]], align 4
280280
// CHECK-NEXT: [[RET:%.*]] = alloca i32, align 4
281281
// CHECK-NEXT: store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 4
282-
// CHECK-NEXT: call void @llvm.va_start(ptr [[VA]])
282+
// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])
283283
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
284284
// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 4
285285
// CHECK-NEXT: store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
@@ -302,7 +302,7 @@ double f_va_3(char *fmt, ...) {
302302
// CHECK-NEXT: [[ARGP_NEXT9:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR8]], i32 16
303303
// CHECK-NEXT: store ptr [[ARGP_NEXT9]], ptr [[VA]], align 4
304304
// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[LS]], ptr align 4 [[ARGP_CUR8]], i32 16, i1 false)
305-
// CHECK-NEXT: call void @llvm.va_end(ptr [[VA]])
305+
// CHECK-NEXT: call void @llvm.va_end.p0(ptr [[VA]])
306306
int f_va_4(char *fmt, ...) {
307307
__builtin_va_list va;
308308

‎clang/test/CodeGen/LoongArch/abi-lp64d.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -449,13 +449,13 @@ void f_va_caller(void) {
449449
// CHECK-NEXT: [[VA:%.*]] = alloca ptr, align 8
450450
// CHECK-NEXT: [[V:%.*]] = alloca i32, align 4
451451
// CHECK-NEXT: store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 8
452-
// CHECK-NEXT: call void @llvm.va_start(ptr [[VA]])
452+
// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])
453453
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 8
454454
// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i64 8
455455
// CHECK-NEXT: store ptr [[ARGP_NEXT]], ptr [[VA]], align 8
456456
// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARGP_CUR]], align 8
457457
// CHECK-NEXT: store i32 [[TMP0]], ptr [[V]], align 4
458-
// CHECK-NEXT: call void @llvm.va_end(ptr [[VA]])
458+
// CHECK-NEXT: call void @llvm.va_end.p0(ptr [[VA]])
459459
// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[V]], align 4
460460
// CHECK-NEXT: ret i32 [[TMP1]]
461461
int f_va_int(char *fmt, ...) {

‎clang/test/CodeGen/PowerPC/aix-altivec-vaargs.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ vector double vector_varargs(int count, ...) {
1717
}
1818

1919
// CHECK: %arg_list = alloca ptr
20-
// CHECK: call void @llvm.va_start(ptr %arg_list)
20+
// CHECK: call void @llvm.va_start.p0(ptr %arg_list)
2121

2222
// AIX32: for.body:
2323
// AIX32-NEXT: %argp.cur = load ptr, ptr %arg_list, align 4
@@ -41,4 +41,4 @@ vector double vector_varargs(int count, ...) {
4141

4242

4343
// CHECK: for.end:
44-
// CHECK: call void @llvm.va_end(ptr %arg_list)
44+
// CHECK: call void @llvm.va_end.p0(ptr %arg_list)

‎clang/test/CodeGen/PowerPC/aix-vaargs.c

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,7 @@ void testva (int n, ...) {
3535

3636
// CHECK-NEXT: %v = alloca i32, align 4
3737
// CHECK-NEXT: store i32 %n, ptr %n.addr, align 4
38-
// CHECK-NEXT: call void @llvm.va_start(ptr %ap)
38+
// CHECK-NEXT: call void @llvm.va_start.p0(ptr %ap)
3939

4040
// AIX32-NEXT: %argp.cur = load ptr, ptr %ap, align 4
4141
// AIX32-NEXT: %argp.next = getelementptr inbounds i8, ptr %argp.cur, i32 16
@@ -48,7 +48,7 @@ void testva (int n, ...) {
4848
// AIX32-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 8 %t, ptr align 4 %argp.cur, i32 16, i1 false)
4949
// AIX64-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 %t, ptr align 8 %argp.cur, i64 16, i1 false)
5050

51-
// CHECK-NEXT: call void @llvm.va_copy(ptr %ap2, ptr %ap)
51+
// CHECK-NEXT: call void @llvm.va_copy.p0(ptr %ap2, ptr %ap)
5252

5353
// AIX32-NEXT: %argp.cur1 = load ptr, ptr %ap2, align 4
5454
// AIX32-NEXT: %argp.next2 = getelementptr inbounds i8, ptr %argp.cur1, i32 4
@@ -62,14 +62,14 @@ void testva (int n, ...) {
6262
// AIX64-NEXT: %1 = load i32, ptr %0, align 4
6363
// AIX64-NEXT: store i32 %1, ptr %v, align 4
6464

65-
// CHECK-NEXT: call void @llvm.va_end(ptr %ap2)
66-
// CHECK-NEXT: call void @llvm.va_end(ptr %ap)
65+
// CHECK-NEXT: call void @llvm.va_end.p0(ptr %ap2)
66+
// CHECK-NEXT: call void @llvm.va_end.p0(ptr %ap)
6767
// CHECK-NEXT: ret void
6868

69-
// CHECK: declare void @llvm.va_start(ptr)
69+
// CHECK: declare void @llvm.va_start.p0(ptr)
7070

7171
// AIX32: declare void @llvm.memcpy.p0.p0.i32(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i32, i1 immarg)
7272
// AIX64: declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg)
7373

74-
// CHECK: declare void @llvm.va_copy(ptr, ptr)
75-
// CHECK: declare void @llvm.va_end(ptr)
74+
// CHECK: declare void @llvm.va_copy.p0(ptr, ptr)
75+
// CHECK: declare void @llvm.va_end.p0(ptr)

‎clang/test/CodeGen/PowerPC/ppc64le-varargs-f128.c

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@ void foo_ls(ldbl128_s);
3131
// OMP-TARGET: call void @foo_ld(ppc_fp128 noundef %[[V3]])
3232

3333
// OMP-HOST-LABEL: define{{.*}} void @omp(
34-
// OMP-HOST: call void @llvm.va_start(ptr %[[AP:[0-9a-zA-Z_.]+]])
34+
// OMP-HOST: call void @llvm.va_start.p0(ptr %[[AP:[0-9a-zA-Z_.]+]])
3535
// OMP-HOST: %[[CUR:[0-9a-zA-Z_.]+]] = load ptr, ptr %[[AP]], align 8
3636
// OMP-HOST: %[[TMP0:[^ ]+]] = getelementptr inbounds i8, ptr %[[CUR]], i32 15
3737
// OMP-HOST: %[[ALIGN:[^ ]+]] = call ptr @llvm.ptrmask.p0.i64(ptr %[[TMP0]], i64 -16)
@@ -49,13 +49,13 @@ void omp(int n, ...) {
4949
}
5050

5151
// IEEE-LABEL: define{{.*}} void @f128
52-
// IEEE: call void @llvm.va_start(ptr %[[AP:[0-9a-zA-Z_.]+]])
52+
// IEEE: call void @llvm.va_start.p0(ptr %[[AP:[0-9a-zA-Z_.]+]])
5353
// IEEE: %[[CUR:[0-9a-zA-Z_.]+]] = load ptr, ptr %[[AP]]
5454
// IEEE: %[[TMP0:[^ ]+]] = getelementptr inbounds i8, ptr %[[CUR]], i32 15
5555
// IEEE: %[[ALIGN:[^ ]+]] = call ptr @llvm.ptrmask.p0.i64(ptr %[[TMP0]], i64 -16)
5656
// IEEE: %[[V4:[0-9a-zA-Z_.]+]] = load fp128, ptr %[[ALIGN]], align 16
5757
// IEEE: call void @foo_fq(fp128 noundef %[[V4]])
58-
// IEEE: call void @llvm.va_end(ptr %[[AP]])
58+
// IEEE: call void @llvm.va_end.p0(ptr %[[AP]])
5959
void f128(int n, ...) {
6060
va_list ap;
6161
va_start(ap, n);
@@ -64,20 +64,20 @@ void f128(int n, ...) {
6464
}
6565

6666
// IEEE-LABEL: define{{.*}} void @long_double
67-
// IEEE: call void @llvm.va_start(ptr %[[AP:[0-9a-zA-Z_.]+]])
67+
// IEEE: call void @llvm.va_start.p0(ptr %[[AP:[0-9a-zA-Z_.]+]])
6868
// IEEE: %[[CUR:[0-9a-zA-Z_.]+]] = load ptr, ptr %[[AP]]
6969
// IEEE: %[[TMP0:[^ ]+]] = getelementptr inbounds i8, ptr %[[CUR]], i32 15
7070
// IEEE: %[[ALIGN:[^ ]+]] = call ptr @llvm.ptrmask.p0.i64(ptr %[[TMP0]], i64 -16)
7171
// IEEE: %[[V4:[0-9a-zA-Z_.]+]] = load fp128, ptr %[[ALIGN]], align 16
7272
// IEEE: call void @foo_ld(fp128 noundef %[[V4]])
73-
// IEEE: call void @llvm.va_end(ptr %[[AP]])
73+
// IEEE: call void @llvm.va_end.p0(ptr %[[AP]])
7474

7575
// IBM-LABEL: define{{.*}} void @long_double
76-
// IBM: call void @llvm.va_start(ptr %[[AP:[0-9a-zA-Z_.]+]])
76+
// IBM: call void @llvm.va_start.p0(ptr %[[AP:[0-9a-zA-Z_.]+]])
7777
// IBM: %[[CUR:[0-9a-zA-Z_.]+]] = load ptr, ptr %[[AP]]
7878
// IBM: %[[V4:[0-9a-zA-Z_.]+]] = load ppc_fp128, ptr %[[CUR]], align 8
7979
// IBM: call void @foo_ld(ppc_fp128 noundef %[[V4]])
80-
// IBM: call void @llvm.va_end(ptr %[[AP]])
80+
// IBM: call void @llvm.va_end.p0(ptr %[[AP]])
8181
void long_double(int n, ...) {
8282
va_list ap;
8383
va_start(ap, n);
@@ -86,7 +86,7 @@ void long_double(int n, ...) {
8686
}
8787

8888
// IEEE-LABEL: define{{.*}} void @long_double_struct
89-
// IEEE: call void @llvm.va_start(ptr %[[AP:[0-9a-zA-Z_.]+]])
89+
// IEEE: call void @llvm.va_start.p0(ptr %[[AP:[0-9a-zA-Z_.]+]])
9090
// IEEE: %[[CUR:[0-9a-zA-Z_.]+]] = load ptr, ptr %[[AP]]
9191
// IEEE: %[[TMP0:[^ ]+]] = getelementptr inbounds i8, ptr %[[CUR]], i32 15
9292
// IEEE: %[[ALIGN:[^ ]+]] = call ptr @llvm.ptrmask.p0.i64(ptr %[[TMP0]], i64 -16)
@@ -96,7 +96,7 @@ void long_double(int n, ...) {
9696
// IEEE: %[[COERCE:[0-9a-zA-Z_.]+]] = getelementptr inbounds %struct.ldbl128_s, ptr %[[TMP]], i32 0, i32 0
9797
// IEEE: %[[V4:[0-9a-zA-Z_.]+]] = load fp128, ptr %[[COERCE]], align 16
9898
// IEEE: call void @foo_ls(fp128 inreg %[[V4]])
99-
// IEEE: call void @llvm.va_end(ptr %[[AP]])
99+
// IEEE: call void @llvm.va_end.p0(ptr %[[AP]])
100100
void long_double_struct(int n, ...) {
101101
va_list ap;
102102
va_start(ap, n);

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