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[VPlan] Add support for in-loop AnyOf reductions
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7 files changed

+1771
-32
lines changed

7 files changed

+1771
-32
lines changed

‎llvm/lib/Analysis/IVDescriptors.cpp

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1184,15 +1184,15 @@ RecurrenceDescriptor::getReductionOpChain(PHINode *Phi, Loop *L) const {
11841184
// more expensive than out-of-loop reductions, and need to be costed more
11851185
// carefully.
11861186
unsigned ExpectedUses = 1;
1187-
if (RedOp == Instruction::ICmp || RedOp == Instruction::FCmp)
1187+
if (isMinMaxRecurrenceKind(getRecurrenceKind()))
11881188
ExpectedUses = 2;
11891189

11901190
auto getNextInstruction = [&](Instruction *Cur) -> Instruction * {
11911191
for (auto *User : Cur->users()) {
11921192
Instruction *UI = cast<Instruction>(User);
11931193
if (isa<PHINode>(UI))
11941194
continue;
1195-
if (RedOp == Instruction::ICmp || RedOp == Instruction::FCmp) {
1195+
if (isMinMaxRecurrenceKind(Kind)) {
11961196
// We are expecting a icmp/select pair, which we go to the next select
11971197
// instruction if we can. We already know that Cur has 2 uses.
11981198
if (isa<SelectInst>(UI))
@@ -1204,11 +1204,13 @@ RecurrenceDescriptor::getReductionOpChain(PHINode *Phi, Loop *L) const {
12041204
return nullptr;
12051205
};
12061206
auto isCorrectOpcode = [&](Instruction *Cur) {
1207-
if (RedOp == Instruction::ICmp || RedOp == Instruction::FCmp) {
1207+
if (isMinMaxRecurrenceKind(getRecurrenceKind())) {
12081208
Value *LHS, *RHS;
12091209
return SelectPatternResult::isMinOrMax(
12101210
matchSelectPattern(Cur, LHS, RHS).Flavor);
12111211
}
1212+
if (isAnyOfRecurrenceKind(getRecurrenceKind()))
1213+
return isa<SelectInst>(Cur);
12121214
// Recognize a call to the llvm.fmuladd intrinsic.
12131215
if (isFMulAddIntrinsic(Cur))
12141216
return true;

‎llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

Lines changed: 28 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -5868,6 +5868,14 @@ LoopVectorizationCostModel::getReductionPatternCost(Instruction *I,
58685868
Intrinsic::ID MinMaxID = getMinMaxReductionIntrinsicOp(RK);
58695869
BaseCost = TTI.getMinMaxReductionCost(MinMaxID, VectorTy,
58705870
RdxDesc.getFastMathFlags(), CostKind);
5871+
} else if (RecurrenceDescriptor::isAnyOfRecurrenceKind(RK)) {
5872+
VectorType *BoolTy = VectorType::get(
5873+
Type::getInt1Ty(VectorTy->getContext()), VectorTy->getElementCount());
5874+
BaseCost =
5875+
TTI.getArithmeticReductionCost(Instruction::Or, BoolTy,
5876+
RdxDesc.getFastMathFlags(), CostKind) +
5877+
TTI.getArithmeticInstrCost(Instruction::Or, BoolTy->getScalarType(),
5878+
CostKind);
58715879
} else {
58725880
BaseCost = TTI.getArithmeticReductionCost(
58735881
RdxDesc.getOpcode(), VectorTy, RdxDesc.getFastMathFlags(), CostKind);
@@ -9697,10 +9705,8 @@ void LoopVectorizationPlanner::adjustRecipesForReductions(
96979705

96989706
const RecurrenceDescriptor &RdxDesc = PhiR->getRecurrenceDescriptor();
96999707
RecurKind Kind = RdxDesc.getRecurrenceKind();
9700-
assert(
9701-
!RecurrenceDescriptor::isAnyOfRecurrenceKind(Kind) &&
9702-
!RecurrenceDescriptor::isFindLastIVRecurrenceKind(Kind) &&
9703-
"AnyOf and FindLast reductions are not allowed for in-loop reductions");
9708+
assert(!RecurrenceDescriptor::isFindLastIVRecurrenceKind(Kind) &&
9709+
"FindLast reductions are not allowed for in-loop reductions");
97049710

97059711
// Collect the chain of "link" recipes for the reduction starting at PhiR.
97069712
SetVector<VPSingleDefRecipe *> Worklist;
@@ -9769,6 +9775,11 @@ void LoopVectorizationPlanner::adjustRecipesForReductions(
97699775
CurrentLinkI->getFastMathFlags());
97709776
LinkVPBB->insert(FMulRecipe, CurrentLink->getIterator());
97719777
VecOp = FMulRecipe;
9778+
} else if (RecurrenceDescriptor::isAnyOfRecurrenceKind(Kind)) {
9779+
assert(isa<VPWidenSelectRecipe>(CurrentLink) &&
9780+
"must be a select recipe");
9781+
VecOp = CurrentLink->getOperand(0);
9782+
Kind = RecurKind::Or;
97729783
} else {
97739784
if (RecurrenceDescriptor::isMinMaxRecurrenceKind(Kind)) {
97749785
if (isa<VPWidenRecipe>(CurrentLink)) {
@@ -9804,8 +9815,8 @@ void LoopVectorizationPlanner::adjustRecipesForReductions(
98049815
CondOp = RecipeBuilder.getBlockInMask(BB);
98059816

98069817
auto *RedRecipe = new VPReductionRecipe(
9807-
RdxDesc.getRecurrenceKind(), RdxDesc.getFastMathFlags(), CurrentLinkI,
9808-
PreviousLink, VecOp, CondOp, CM.useOrderedReductions(RdxDesc),
9818+
Kind, RdxDesc.getFastMathFlags(), CurrentLinkI, PreviousLink, VecOp,
9819+
CondOp, CM.useOrderedReductions(RdxDesc),
98099820
CurrentLinkI->getDebugLoc());
98109821
// Append the recipe to the end of the VPBasicBlock because we need to
98119822
// ensure that it comes after all of it's inputs, including CondOp.
@@ -9930,10 +9941,17 @@ void LoopVectorizationPlanner::adjustRecipesForReductions(
99309941
// selected if the negated condition is true in any iteration.
99319942
if (Select->getOperand(1) == PhiR)
99329943
Cmp = Builder.createNot(Cmp);
9933-
VPValue *Or = Builder.createOr(PhiR, Cmp);
9934-
Select->getVPSingleValue()->replaceAllUsesWith(Or);
9935-
// Delete Select now that it has invalid types.
9936-
ToDelete.push_back(Select);
9944+
9945+
if (PhiR->isInLoop() && MinVF.isVector()) {
9946+
auto *Reduction = cast<VPReductionRecipe>(
9947+
*find_if(PhiR->users(), IsaPred<VPReductionRecipe>));
9948+
Reduction->setOperand(1, Cmp);
9949+
} else {
9950+
VPValue *Or = Builder.createOr(PhiR, Cmp);
9951+
Select->getVPSingleValue()->replaceAllUsesWith(Or);
9952+
// Delete Select now that it has invalid types.
9953+
ToDelete.push_back(Select);
9954+
}
99379955

99389956
// Convert the reduction phi to operate on bools.
99399957
PhiR->setOperand(0, Plan->getOrAddLiveIn(ConstantInt::getFalse(

‎llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -668,10 +668,10 @@ Value *VPInstruction::generate(VPTransformState &State) {
668668

669669
// Create the reduction after the loop. Note that inloop reductions create
670670
// the target reduction in the loop using a Reduction recipe.
671-
if ((State.VF.isVector() ||
672-
RecurrenceDescriptor::isAnyOfRecurrenceKind(RK) ||
673-
RecurrenceDescriptor::isFindLastIVRecurrenceKind(RK)) &&
674-
!PhiR->isInLoop()) {
671+
if (((State.VF.isVector() ||
672+
RecurrenceDescriptor::isFindLastIVRecurrenceKind(RK)) &&
673+
!PhiR->isInLoop()) ||
674+
RecurrenceDescriptor::isAnyOfRecurrenceKind(RK)) {
675675
// TODO: Support in-order reductions based on the recurrence descriptor.
676676
// All ops in the reduction inherit fast-math-flags from the recurrence
677677
// descriptor.
@@ -2287,7 +2287,7 @@ void VPReductionRecipe::execute(VPTransformState &State) {
22872287
Value *PrevInChain = State.get(getChainOp(), /*IsScalar*/ true);
22882288
RecurKind Kind = getRecurrenceKind();
22892289
assert(!RecurrenceDescriptor::isAnyOfRecurrenceKind(Kind) &&
2290-
"In-loop AnyOf reductions aren't currently supported");
2290+
"In-loop AnyOf reduction should use Or reduction recipe");
22912291
// Propagate the fast-math flags carried by the underlying instruction.
22922292
IRBuilderBase::FastMathFlagGuard FMFGuard(State.Builder);
22932293
State.Builder.setFastMathFlags(getFastMathFlags());

‎llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll

Lines changed: 12 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -1924,23 +1924,22 @@ define i32 @anyof_icmp(ptr %a, i64 %n, i32 %start, i32 %inv) {
19241924
; IF-EVL: vector.body:
19251925
; IF-EVL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
19261926
; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], [[VECTOR_BODY]] ]
1927-
; IF-EVL-NEXT: [[VEC_PHI:%.*]] = phi <vscale x 4 x i1> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP16:%.*]], [[VECTOR_BODY]] ]
1927+
; IF-EVL-NEXT: [[VEC_PHI:%.*]] = phi i1 [ false, [[VECTOR_PH]] ], [ [[TMP19:%.*]], [[VECTOR_BODY]] ]
19281928
; IF-EVL-NEXT: [[TMP9:%.*]] = sub i64 [[N]], [[EVL_BASED_IV]]
19291929
; IF-EVL-NEXT: [[TMP10:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP9]], i32 4, i1 true)
19301930
; IF-EVL-NEXT: [[TMP11:%.*]] = add i64 [[EVL_BASED_IV]], 0
19311931
; IF-EVL-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[TMP11]]
19321932
; IF-EVL-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr [[TMP12]], i32 0
19331933
; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP13]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP10]])
19341934
; IF-EVL-NEXT: [[TMP14:%.*]] = icmp slt <vscale x 4 x i32> [[VP_OP_LOAD]], splat (i32 3)
1935-
; IF-EVL-NEXT: [[TMP15:%.*]] = or <vscale x 4 x i1> [[VEC_PHI]], [[TMP14]]
1936-
; IF-EVL-NEXT: [[TMP16]] = call <vscale x 4 x i1> @llvm.vp.merge.nxv4i1(<vscale x 4 x i1> splat (i1 true), <vscale x 4 x i1> [[TMP15]], <vscale x 4 x i1> [[VEC_PHI]], i32 [[TMP10]])
1935+
; IF-EVL-NEXT: [[TMP15:%.*]] = call i1 @llvm.vp.reduce.or.nxv4i1(i1 false, <vscale x 4 x i1> [[TMP14]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP10]])
1936+
; IF-EVL-NEXT: [[TMP19]] = or i1 [[TMP15]], [[VEC_PHI]]
19371937
; IF-EVL-NEXT: [[TMP17:%.*]] = zext i32 [[TMP10]] to i64
19381938
; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP17]], [[EVL_BASED_IV]]
19391939
; IF-EVL-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], [[TMP8]]
19401940
; IF-EVL-NEXT: [[TMP18:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
19411941
; IF-EVL-NEXT: br i1 [[TMP18]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP34:![0-9]+]]
19421942
; IF-EVL: middle.block:
1943-
; IF-EVL-NEXT: [[TMP19:%.*]] = call i1 @llvm.vector.reduce.or.nxv4i1(<vscale x 4 x i1> [[TMP16]])
19441943
; IF-EVL-NEXT: [[TMP20:%.*]] = freeze i1 [[TMP19]]
19451944
; IF-EVL-NEXT: [[RDX_SELECT:%.*]] = select i1 [[TMP20]], i32 [[INV:%.*]], i32 [[START:%.*]]
19461945
; IF-EVL-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]]
@@ -1978,18 +1977,18 @@ define i32 @anyof_icmp(ptr %a, i64 %n, i32 %start, i32 %inv) {
19781977
; NO-VP-NEXT: br label [[VECTOR_BODY:%.*]]
19791978
; NO-VP: vector.body:
19801979
; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
1981-
; NO-VP-NEXT: [[VEC_PHI:%.*]] = phi <vscale x 4 x i1> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP10:%.*]], [[VECTOR_BODY]] ]
1980+
; NO-VP-NEXT: [[VEC_PHI:%.*]] = phi i1 [ false, [[VECTOR_PH]] ], [ [[TMP12:%.*]], [[VECTOR_BODY]] ]
19821981
; NO-VP-NEXT: [[TMP6:%.*]] = add i64 [[INDEX]], 0
19831982
; NO-VP-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[TMP6]]
19841983
; NO-VP-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[TMP7]], i32 0
19851984
; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x i32>, ptr [[TMP8]], align 4
19861985
; NO-VP-NEXT: [[TMP9:%.*]] = icmp slt <vscale x 4 x i32> [[WIDE_LOAD]], splat (i32 3)
1987-
; NO-VP-NEXT: [[TMP10]] = or <vscale x 4 x i1> [[VEC_PHI]], [[TMP9]]
1986+
; NO-VP-NEXT: [[TMP10:%.*]] = call i1 @llvm.vector.reduce.or.nxv4i1(<vscale x 4 x i1> [[TMP9]])
1987+
; NO-VP-NEXT: [[TMP12]] = or i1 [[TMP10]], [[VEC_PHI]]
19881988
; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP5]]
19891989
; NO-VP-NEXT: [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
19901990
; NO-VP-NEXT: br i1 [[TMP11]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP34:![0-9]+]]
19911991
; NO-VP: middle.block:
1992-
; NO-VP-NEXT: [[TMP12:%.*]] = call i1 @llvm.vector.reduce.or.nxv4i1(<vscale x 4 x i1> [[TMP10]])
19931992
; NO-VP-NEXT: [[TMP13:%.*]] = freeze i1 [[TMP12]]
19941993
; NO-VP-NEXT: [[RDX_SELECT:%.*]] = select i1 [[TMP13]], i32 [[INV:%.*]], i32 [[START:%.*]]
19951994
; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]
@@ -2051,23 +2050,22 @@ define i32 @anyof_fcmp(ptr %a, i64 %n, i32 %start, i32 %inv) {
20512050
; IF-EVL: vector.body:
20522051
; IF-EVL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
20532052
; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], [[VECTOR_BODY]] ]
2054-
; IF-EVL-NEXT: [[VEC_PHI:%.*]] = phi <vscale x 4 x i1> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP16:%.*]], [[VECTOR_BODY]] ]
2053+
; IF-EVL-NEXT: [[VEC_PHI:%.*]] = phi i1 [ false, [[VECTOR_PH]] ], [ [[TMP19:%.*]], [[VECTOR_BODY]] ]
20552054
; IF-EVL-NEXT: [[TMP9:%.*]] = sub i64 [[N]], [[EVL_BASED_IV]]
20562055
; IF-EVL-NEXT: [[TMP10:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP9]], i32 4, i1 true)
20572056
; IF-EVL-NEXT: [[TMP11:%.*]] = add i64 [[EVL_BASED_IV]], 0
20582057
; IF-EVL-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[TMP11]]
20592058
; IF-EVL-NEXT: [[TMP13:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i32 0
20602059
; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x float> @llvm.vp.load.nxv4f32.p0(ptr align 4 [[TMP13]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP10]])
20612060
; IF-EVL-NEXT: [[TMP14:%.*]] = fcmp fast olt <vscale x 4 x float> [[VP_OP_LOAD]], splat (float 3.000000e+00)
2062-
; IF-EVL-NEXT: [[TMP15:%.*]] = or <vscale x 4 x i1> [[VEC_PHI]], [[TMP14]]
2063-
; IF-EVL-NEXT: [[TMP16]] = call <vscale x 4 x i1> @llvm.vp.merge.nxv4i1(<vscale x 4 x i1> splat (i1 true), <vscale x 4 x i1> [[TMP15]], <vscale x 4 x i1> [[VEC_PHI]], i32 [[TMP10]])
2061+
; IF-EVL-NEXT: [[TMP15:%.*]] = call i1 @llvm.vp.reduce.or.nxv4i1(i1 false, <vscale x 4 x i1> [[TMP14]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP10]])
2062+
; IF-EVL-NEXT: [[TMP19]] = or i1 [[TMP15]], [[VEC_PHI]]
20642063
; IF-EVL-NEXT: [[TMP17:%.*]] = zext i32 [[TMP10]] to i64
20652064
; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP17]], [[EVL_BASED_IV]]
20662065
; IF-EVL-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], [[TMP8]]
20672066
; IF-EVL-NEXT: [[TMP18:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
20682067
; IF-EVL-NEXT: br i1 [[TMP18]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP36:![0-9]+]]
20692068
; IF-EVL: middle.block:
2070-
; IF-EVL-NEXT: [[TMP19:%.*]] = call i1 @llvm.vector.reduce.or.nxv4i1(<vscale x 4 x i1> [[TMP16]])
20712069
; IF-EVL-NEXT: [[TMP20:%.*]] = freeze i1 [[TMP19]]
20722070
; IF-EVL-NEXT: [[RDX_SELECT:%.*]] = select i1 [[TMP20]], i32 [[INV:%.*]], i32 [[START:%.*]]
20732071
; IF-EVL-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]]
@@ -2105,18 +2103,18 @@ define i32 @anyof_fcmp(ptr %a, i64 %n, i32 %start, i32 %inv) {
21052103
; NO-VP-NEXT: br label [[VECTOR_BODY:%.*]]
21062104
; NO-VP: vector.body:
21072105
; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
2108-
; NO-VP-NEXT: [[VEC_PHI:%.*]] = phi <vscale x 4 x i1> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP10:%.*]], [[VECTOR_BODY]] ]
2106+
; NO-VP-NEXT: [[VEC_PHI:%.*]] = phi i1 [ false, [[VECTOR_PH]] ], [ [[TMP12:%.*]], [[VECTOR_BODY]] ]
21092107
; NO-VP-NEXT: [[TMP6:%.*]] = add i64 [[INDEX]], 0
21102108
; NO-VP-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[TMP6]]
21112109
; NO-VP-NEXT: [[TMP8:%.*]] = getelementptr inbounds float, ptr [[TMP7]], i32 0
21122110
; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x float>, ptr [[TMP8]], align 4
21132111
; NO-VP-NEXT: [[TMP9:%.*]] = fcmp fast olt <vscale x 4 x float> [[WIDE_LOAD]], splat (float 3.000000e+00)
2114-
; NO-VP-NEXT: [[TMP10]] = or <vscale x 4 x i1> [[VEC_PHI]], [[TMP9]]
2112+
; NO-VP-NEXT: [[TMP10:%.*]] = call i1 @llvm.vector.reduce.or.nxv4i1(<vscale x 4 x i1> [[TMP9]])
2113+
; NO-VP-NEXT: [[TMP12]] = or i1 [[TMP10]], [[VEC_PHI]]
21152114
; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP5]]
21162115
; NO-VP-NEXT: [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
21172116
; NO-VP-NEXT: br i1 [[TMP11]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP36:![0-9]+]]
21182117
; NO-VP: middle.block:
2119-
; NO-VP-NEXT: [[TMP12:%.*]] = call i1 @llvm.vector.reduce.or.nxv4i1(<vscale x 4 x i1> [[TMP10]])
21202118
; NO-VP-NEXT: [[TMP13:%.*]] = freeze i1 [[TMP12]]
21212119
; NO-VP-NEXT: [[RDX_SELECT:%.*]] = select i1 [[TMP13]], i32 [[INV:%.*]], i32 [[START:%.*]]
21222120
; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]

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