Skip to content

Commit ac47124

Browse files
committed
[LoongArch] Use FirstRelocationKind to remove ELFObjectWriter::recordRelocation special case
The current implementation of R_LARCH_SUB{8,16,32,64} and TLS relocation types relies on fixup kinds FirstLiteralRelocationKind + offset (originally intended for .reloc directives). While this is clever and prevents switch cases like ``` case fixup_...sub8: return ELF::R_LARCH_SUB8; ``` it needs revision. GNU Assembler treats .reloc directives differently from standard relocations, notably by skipping * Skipping STT_SECTION adjustments (when a referenced symbol is local and satisfies certain conditions, it can be redirected to a section symbol). * Skipping STT_TLS symbol type setting for TLS relocations. Encode relocatin type t with FirstRelocationKind+t instead of FirstLiteralRelocationKind+t. The new value is less than FirstLiteralRelocationKind and will not be treated as a .reloc directive. Close #135521
1 parent 52e3f3d commit ac47124

File tree

5 files changed

+36
-35
lines changed

5 files changed

+36
-35
lines changed

llvm/include/llvm/MC/MCFixup.h

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,10 +36,13 @@ enum MCFixupKind {
3636

3737
FirstTargetFixupKind = 128,
3838

39+
/// Targets can use FirstRelocationKind+t to encode relocation type t.
40+
FirstRelocationKind = 256,
41+
3942
/// The range [FirstLiteralRelocationKind, MaxTargetFixupKind) is used for
4043
/// relocations coming from .reloc directive. Fixup kind
4144
/// FirstLiteralRelocationKind+V represents the relocation type with number V.
42-
FirstLiteralRelocationKind = 256,
45+
FirstLiteralRelocationKind = 256 + 1032 + 32,
4346

4447
/// Set limit to accommodate the highest reloc type in use for all Targets,
4548
/// currently R_AARCH64_IRELATIVE at 1032, including room for expansion.

llvm/lib/MC/ELFObjectWriter.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1385,8 +1385,7 @@ void ELFObjectWriter::recordRelocation(MCAssembler &Asm,
13851385

13861386
auto EMachine = TargetObjectWriter->getEMachine();
13871387
unsigned Type;
1388-
if (Fixup.getKind() >= FirstLiteralRelocationKind &&
1389-
EMachine != ELF::EM_LOONGARCH)
1388+
if (Fixup.getKind() >= FirstLiteralRelocationKind)
13901389
Type = Fixup.getKind() - FirstLiteralRelocationKind;
13911390
else
13921391
Type = TargetObjectWriter->getRelocType(Ctx, Target, Fixup, IsPCRel);

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp

Lines changed: 16 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -70,7 +70,7 @@ LoongArchAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
7070

7171
// Fixup kinds from .reloc directive are like R_LARCH_NONE. They
7272
// do not require any extra processing.
73-
if (Kind >= FirstLiteralRelocationKind)
73+
if (unsigned(Kind) >= FirstRelocationKind)
7474
return MCAsmBackend::getFixupKindInfo(FK_NONE);
7575

7676
if (Kind < FirstTargetFixupKind)
@@ -152,10 +152,10 @@ void LoongArchAsmBackend::applyFixup(const MCAssembler &Asm,
152152
if (!Value)
153153
return; // Doesn't change encoding.
154154

155-
MCFixupKind Kind = Fixup.getKind();
156-
if (Kind >= FirstLiteralRelocationKind)
155+
auto Kind = Fixup.getTargetKind();
156+
if (Kind >= FirstRelocationKind)
157157
return;
158-
MCFixupKindInfo Info = getFixupKindInfo(Kind);
158+
MCFixupKindInfo Info = getFixupKindInfo(MCFixupKind(Kind));
159159
MCContext &Ctx = Asm.getContext();
160160

161161
// Fixup leb128 separately.
@@ -271,29 +271,27 @@ getRelocPairForSize(unsigned Size) {
271271
default:
272272
llvm_unreachable("unsupported fixup size");
273273
case 6:
274-
return std::make_pair(
275-
MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_ADD6),
276-
MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_SUB6));
274+
return std::make_pair(MCFixupKind(FirstRelocationKind + ELF::R_LARCH_ADD6),
275+
MCFixupKind(FirstRelocationKind + ELF::R_LARCH_SUB6));
277276
case 8:
278-
return std::make_pair(
279-
MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_ADD8),
280-
MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_SUB8));
277+
return std::make_pair(MCFixupKind(FirstRelocationKind + ELF::R_LARCH_ADD8),
278+
MCFixupKind(FirstRelocationKind + ELF::R_LARCH_SUB8));
281279
case 16:
282280
return std::make_pair(
283-
MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_ADD16),
284-
MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_SUB16));
281+
MCFixupKind(FirstRelocationKind + ELF::R_LARCH_ADD16),
282+
MCFixupKind(FirstRelocationKind + ELF::R_LARCH_SUB16));
285283
case 32:
286284
return std::make_pair(
287-
MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_ADD32),
288-
MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_SUB32));
285+
MCFixupKind(FirstRelocationKind + ELF::R_LARCH_ADD32),
286+
MCFixupKind(FirstRelocationKind + ELF::R_LARCH_SUB32));
289287
case 64:
290288
return std::make_pair(
291-
MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_ADD64),
292-
MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_SUB64));
289+
MCFixupKind(FirstRelocationKind + ELF::R_LARCH_ADD64),
290+
MCFixupKind(FirstRelocationKind + ELF::R_LARCH_SUB64));
293291
case 128:
294292
return std::make_pair(
295-
MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_ADD_ULEB128),
296-
MCFixupKind(FirstLiteralRelocationKind + ELF::R_LARCH_SUB_ULEB128));
293+
MCFixupKind(FirstRelocationKind + ELF::R_LARCH_ADD_ULEB128),
294+
MCFixupKind(FirstRelocationKind + ELF::R_LARCH_SUB_ULEB128));
297295
}
298296
}
299297

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -50,6 +50,12 @@ unsigned LoongArchELFObjectWriter::getRelocType(MCContext &Ctx,
5050
const MCValue &Target,
5151
const MCFixup &Fixup,
5252
bool IsPCRel) const {
53+
// Determine the type of the relocation
54+
unsigned Kind = Fixup.getTargetKind();
55+
56+
if (Kind >= FirstLiteralRelocationKind)
57+
return Kind - FirstLiteralRelocationKind;
58+
5359
switch (Target.getSpecifier()) {
5460
case LoongArchMCExpr::VK_TLS_LE_HI20:
5561
case LoongArchMCExpr::VK_TLS_IE_PC_HI20:
@@ -71,12 +77,8 @@ unsigned LoongArchELFObjectWriter::getRelocType(MCContext &Ctx,
7177
break;
7278
}
7379

74-
// Determine the type of the relocation
75-
unsigned Kind = Fixup.getTargetKind();
76-
77-
if (Kind >= FirstLiteralRelocationKind)
78-
return Kind - FirstLiteralRelocationKind;
79-
80+
if (Kind >= FirstRelocationKind)
81+
return Kind - FirstRelocationKind;
8082
switch (Kind) {
8183
default:
8284
Ctx.reportError(Fixup.getLoc(), "Unsupported relocation type");

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchFixupKinds.h

Lines changed: 7 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -52,11 +52,10 @@ enum Fixups {
5252
fixup_loongarch_invalid,
5353
NumTargetFixupKinds = fixup_loongarch_invalid - FirstTargetFixupKind,
5454

55-
// Define fixups for force relocation as FirstLiteralRelocationKind+V
55+
// Define fixups for force relocation as FirstRelocationKind+V
5656
// represents the relocation type with number V.
5757
// 20-bit fixup corresponding to %pc_hi20(foo) for instruction pcalau12i.
58-
fixup_loongarch_pcala_hi20 =
59-
FirstLiteralRelocationKind + ELF::R_LARCH_PCALA_HI20,
58+
fixup_loongarch_pcala_hi20 = FirstRelocationKind + ELF::R_LARCH_PCALA_HI20,
6059
// 12-bit fixup corresponding to %pc_lo12(foo) for instructions like addi.w/d.
6160
fixup_loongarch_pcala_lo12,
6261
// 20-bit fixup corresponding to %pc64_lo20(foo) for instruction lu32i.d.
@@ -83,7 +82,7 @@ enum Fixups {
8382
// Skip R_LARCH_TLS_LE_*.
8483
// 20-bit fixup corresponding to %ie_pc_hi20(foo) for instruction pcalau12i.
8584
fixup_loongarch_tls_ie_pc_hi20 =
86-
FirstLiteralRelocationKind + ELF::R_LARCH_TLS_IE_PC_HI20,
85+
FirstRelocationKind + ELF::R_LARCH_TLS_IE_PC_HI20,
8786
// 12-bit fixup corresponding to %ie_pc_lo12(foo) for instructions
8887
// ld.w/ld.d/add.d.
8988
fixup_loongarch_tls_ie_pc_lo12,
@@ -108,17 +107,17 @@ enum Fixups {
108107
// 20-bit fixup corresponding to %gd_hi20(foo) for instruction lu12i.w.
109108
fixup_loongarch_tls_gd_hi20,
110109
// Generate an R_LARCH_RELAX which indicates the linker may relax here.
111-
fixup_loongarch_relax = FirstLiteralRelocationKind + ELF::R_LARCH_RELAX,
110+
fixup_loongarch_relax = FirstRelocationKind + ELF::R_LARCH_RELAX,
112111
// Generate an R_LARCH_ALIGN which indicates the linker may fixup align here.
113-
fixup_loongarch_align = FirstLiteralRelocationKind + ELF::R_LARCH_ALIGN,
112+
fixup_loongarch_align = FirstRelocationKind + ELF::R_LARCH_ALIGN,
114113
// 20-bit fixup corresponding to %pcrel_20(foo) for instruction pcaddi.
115114
fixup_loongarch_pcrel20_s2,
116115
// 36-bit fixup corresponding to %call36(foo) for a pair instructions:
117116
// pcaddu18i+jirl.
118-
fixup_loongarch_call36 = FirstLiteralRelocationKind + ELF::R_LARCH_CALL36,
117+
fixup_loongarch_call36 = FirstRelocationKind + ELF::R_LARCH_CALL36,
119118
// 20-bit fixup corresponding to %desc_pc_hi20(foo) for instruction pcalau12i.
120119
fixup_loongarch_tls_desc_pc_hi20 =
121-
FirstLiteralRelocationKind + ELF::R_LARCH_TLS_DESC_PC_HI20,
120+
FirstRelocationKind + ELF::R_LARCH_TLS_DESC_PC_HI20,
122121
// 12-bit fixup corresponding to %desc_pc_lo12(foo) for instructions like
123122
// addi.w/d.
124123
fixup_loongarch_tls_desc_pc_lo12,

0 commit comments

Comments
 (0)