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[RISCV][NFCI] Rename rv32+rv64 testcases (#120717)
All these testcases were called `rv32<something>.s`, but had equivalent RUN lines for both riscv32 and riscv64. This made it hard to add tests which are only valid on one of riscv32 or riscv64. This change makes the tests follow a naming convention: - `rv32*.s` means a test for riscv32-specific behaviour - `rv64*.s` means a test for riscv64-specific behaviour - `rv*.s` (without 64 or 32) means a test for both base architectures - the majority of tests/behaviour. This should make it easier to add and name extension-specific tests which do depend on the base architecture.
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‎llvm/test/MC/RISCV/rv32c-valid.s renamed to ‎llvm/test/MC/RISCV/rvc-valid.s

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‎llvm/test/MC/RISCV/rv32d-valid.s renamed to ‎llvm/test/MC/RISCV/rvd-valid.s

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‎llvm/test/MC/RISCV/rv32e-invalid.s renamed to ‎llvm/test/MC/RISCV/rve-invalid.s

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‎llvm/test/MC/RISCV/rv32e-valid.s renamed to ‎llvm/test/MC/RISCV/rve-valid.s

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‎llvm/test/MC/RISCV/rv32f-valid.s renamed to ‎llvm/test/MC/RISCV/rvf-valid.s

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‎llvm/test/MC/RISCV/rv32i-valid.s renamed to ‎llvm/test/MC/RISCV/rvi-valid.s

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‎llvm/test/MC/RISCV/rv32ih-aliases-valid.s renamed to ‎llvm/test/MC/RISCV/rvih-aliases-valid.s

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‎llvm/test/MC/RISCV/rv32ih-valid.s renamed to ‎llvm/test/MC/RISCV/rvih-valid.s

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‎llvm/test/MC/RISCV/rv32m-valid.s renamed to ‎llvm/test/MC/RISCV/rvm-valid.s

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‎llvm/test/MC/RISCV/rv32xtheadbs-valid.s renamed to ‎llvm/test/MC/RISCV/rvxtheadbs-valid.s

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‎llvm/test/MC/RISCV/rv32zaamo-valid.s renamed to ‎llvm/test/MC/RISCV/rvzaamo-valid.s

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‎llvm/test/MC/RISCV/rv32zacas-valid.s renamed to ‎llvm/test/MC/RISCV/rvzacas-valid.s

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‎llvm/test/MC/RISCV/rv32zalasr-valid.s renamed to ‎llvm/test/MC/RISCV/rvzalasr-valid.s

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‎llvm/test/MC/RISCV/rv32zalrsc-valid.s renamed to ‎llvm/test/MC/RISCV/rvzalrsc-valid.s

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‎llvm/test/MC/RISCV/rv32zba-valid.s renamed to ‎llvm/test/MC/RISCV/rvzba-valid.s

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‎llvm/test/MC/RISCV/rv32zbb-valid.s renamed to ‎llvm/test/MC/RISCV/rvzbb-valid.s

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‎llvm/test/MC/RISCV/rv32zbc-valid.s renamed to ‎llvm/test/MC/RISCV/rvzbc-valid.s

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‎llvm/test/MC/RISCV/rv32zbkb-valid.s renamed to ‎llvm/test/MC/RISCV/rvzbkb-valid.s

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‎llvm/test/MC/RISCV/rv32zbkc-valid.s renamed to ‎llvm/test/MC/RISCV/rvzbkc-valid.s

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‎llvm/test/MC/RISCV/rv32zbkx-valid.s renamed to ‎llvm/test/MC/RISCV/rvzbkx-valid.s

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‎llvm/test/MC/RISCV/rv32zbs-valid.s renamed to ‎llvm/test/MC/RISCV/rvzbs-valid.s

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‎llvm/test/MC/RISCV/rv32zcb-invalid.s renamed to ‎llvm/test/MC/RISCV/rvzcb-invalid.s

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‎llvm/test/MC/RISCV/rv32zcb-valid.s renamed to ‎llvm/test/MC/RISCV/rvzcb-valid.s

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‎llvm/test/MC/RISCV/rv32zcmt-invalid.s renamed to ‎llvm/test/MC/RISCV/rvzcmt-invalid.s

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‎llvm/test/MC/RISCV/rv32zcmt-valid.s renamed to ‎llvm/test/MC/RISCV/rvzcmt-valid.s

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‎llvm/test/MC/RISCV/rv32zdinx-valid.s renamed to ‎llvm/test/MC/RISCV/rvzdinx-valid.s

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‎llvm/test/MC/RISCV/rv32zfbfmin-invalid.s renamed to ‎llvm/test/MC/RISCV/rvzfbfmin-invalid.s

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‎llvm/test/MC/RISCV/rv32zfbfmin-valid.s renamed to ‎llvm/test/MC/RISCV/rvzfbfmin-valid.s

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‎llvm/test/MC/RISCV/rv32zfh-valid.s renamed to ‎llvm/test/MC/RISCV/rvzfh-valid.s

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‎llvm/test/MC/RISCV/rv32zfhmin-invalid.s renamed to ‎llvm/test/MC/RISCV/rvzfhmin-invalid.s

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‎llvm/test/MC/RISCV/rv32zfhmin-valid.s renamed to ‎llvm/test/MC/RISCV/rvzfhmin-valid.s

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‎llvm/test/MC/RISCV/rv32zfinx-valid.s renamed to ‎llvm/test/MC/RISCV/rvzfinx-valid.s

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‎llvm/test/MC/RISCV/rv32zhinx-valid.s renamed to ‎llvm/test/MC/RISCV/rvzhinx-valid.s

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‎llvm/test/MC/RISCV/rv32zhinxmin-valid.s renamed to ‎llvm/test/MC/RISCV/rvzhinxmin-valid.s

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‎llvm/test/MC/RISCV/rv32zicbom-invalid.s renamed to ‎llvm/test/MC/RISCV/rvzicbom-invalid.s

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‎llvm/test/MC/RISCV/rv32zicbom-valid.s renamed to ‎llvm/test/MC/RISCV/rvzicbom-valid.s

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‎llvm/test/MC/RISCV/rv32zicbop-invalid.s renamed to ‎llvm/test/MC/RISCV/rvzicbop-invalid.s

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‎llvm/test/MC/RISCV/rv32zicbop-valid.s renamed to ‎llvm/test/MC/RISCV/rvzicbop-valid.s

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‎llvm/test/MC/RISCV/rv32zicboz-invalid.s renamed to ‎llvm/test/MC/RISCV/rvzicboz-invalid.s

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‎llvm/test/MC/RISCV/rv32zicboz-valid.s renamed to ‎llvm/test/MC/RISCV/rvzicboz-valid.s

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‎llvm/test/MC/RISCV/rv32zicond-invalid.s renamed to ‎llvm/test/MC/RISCV/rvzicond-invalid.s

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‎llvm/test/MC/RISCV/rv32zicond-valid.s renamed to ‎llvm/test/MC/RISCV/rvzicond-valid.s

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‎llvm/test/MC/RISCV/rv32zihintntl-invalid.s renamed to ‎llvm/test/MC/RISCV/rvzihintntl-invalid.s

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‎llvm/test/MC/RISCV/rv32zihintntl-valid.s renamed to ‎llvm/test/MC/RISCV/rvzihintntl-valid.s

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‎llvm/test/MC/RISCV/rv32zihintntlc-invalid.s renamed to ‎llvm/test/MC/RISCV/rvzihintntlc-invalid.s

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‎llvm/test/MC/RISCV/rv32zihintntlc-valid.s renamed to ‎llvm/test/MC/RISCV/rvzihintntlc-valid.s

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‎llvm/test/MC/RISCV/rv32zihintpause-valid.s renamed to ‎llvm/test/MC/RISCV/rvzihintpause-valid.s

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‎llvm/test/MC/RISCV/rv32zknh-valid.s renamed to ‎llvm/test/MC/RISCV/rvzknh-valid.s

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‎llvm/test/MC/RISCV/rv32zksed-valid.s renamed to ‎llvm/test/MC/RISCV/rvzksed-valid.s

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‎llvm/test/MC/RISCV/rv32zksh-valid.s renamed to ‎llvm/test/MC/RISCV/rvzksh-valid.s

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