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[NVPTX] Enforce half type support is present for builtins
Differential Revision: https://reviews.llvm.org/D146715
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3 files changed

+328
-89
lines changed

3 files changed

+328
-89
lines changed

clang/lib/CodeGen/CGBuiltin.cpp

Lines changed: 211 additions & 66 deletions
Original file line numberDiff line numberDiff line change
@@ -18162,32 +18162,63 @@ static NVPTXMmaInfo getNVPTXMmaInfo(unsigned BuiltinID) {
1816218162
#undef MMA_VARIANTS_B1_XOR
1816318163
}
1816418164

18165+
static Value *MakeLdgLdu(unsigned IntrinsicID, CodeGenFunction &CGF,
18166+
const CallExpr *E) {
18167+
Value *Ptr = CGF.EmitScalarExpr(E->getArg(0));
18168+
QualType ArgType = E->getArg(0)->getType();
18169+
clang::CharUnits Align = CGF.CGM.getNaturalPointeeTypeAlignment(ArgType);
18170+
llvm::Type *ElemTy = CGF.ConvertTypeForMem(ArgType->getPointeeType());
18171+
return CGF.Builder.CreateCall(
18172+
CGF.CGM.getIntrinsic(IntrinsicID, {ElemTy, Ptr->getType()}),
18173+
{Ptr, ConstantInt::get(CGF.Builder.getInt32Ty(), Align.getQuantity())});
18174+
}
18175+
18176+
static Value *MakeScopedAtomic(unsigned IntrinsicID, CodeGenFunction &CGF,
18177+
const CallExpr *E) {
18178+
Value *Ptr = CGF.EmitScalarExpr(E->getArg(0));
18179+
llvm::Type *ElemTy =
18180+
CGF.ConvertTypeForMem(E->getArg(0)->getType()->getPointeeType());
18181+
return CGF.Builder.CreateCall(
18182+
CGF.CGM.getIntrinsic(IntrinsicID, {ElemTy, Ptr->getType()}),
18183+
{Ptr, CGF.EmitScalarExpr(E->getArg(1))});
18184+
}
18185+
18186+
static Value *MakeHalfType(unsigned IntrinsicID, unsigned BuiltinID,
18187+
const CallExpr *E, CodeGenFunction &CGF) {
18188+
auto &C = CGF.CGM.getContext();
18189+
if (!(C.getLangOpts().NativeHalfType ||
18190+
!C.getTargetInfo().useFP16ConversionIntrinsics())) {
18191+
CGF.CGM.Error(E->getExprLoc(), C.BuiltinInfo.getName(BuiltinID).str() +
18192+
" requires native half type support.");
18193+
return nullptr;
18194+
}
18195+
18196+
if (IntrinsicID == Intrinsic::nvvm_ldg_global_f ||
18197+
IntrinsicID == Intrinsic::nvvm_ldu_global_f)
18198+
return MakeLdgLdu(IntrinsicID, CGF, E);
18199+
18200+
SmallVector<Value *, 16> Args;
18201+
auto *F = CGF.CGM.getIntrinsic(IntrinsicID);
18202+
auto *FTy = F->getFunctionType();
18203+
unsigned ICEArguments = 0;
18204+
ASTContext::GetBuiltinTypeError Error;
18205+
C.GetBuiltinType(BuiltinID, Error, &ICEArguments);
18206+
assert(Error == ASTContext::GE_None && "Should not codegen an error");
18207+
for (unsigned i = 0, e = E->getNumArgs(); i != e; ++i) {
18208+
assert((ICEArguments & (1 << i)) == 0);
18209+
auto *ArgValue = CGF.EmitScalarExpr(E->getArg(i));
18210+
auto *PTy = FTy->getParamType(i);
18211+
if (PTy != ArgValue->getType())
18212+
ArgValue = CGF.Builder.CreateBitCast(ArgValue, PTy);
18213+
Args.push_back(ArgValue);
18214+
}
18215+
18216+
return CGF.Builder.CreateCall(F, Args);
18217+
}
1816518218
} // namespace
1816618219

18167-
Value *
18168-
CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, const CallExpr *E) {
18169-
auto HasHalfSupport = [&](unsigned BuiltinID) {
18170-
auto &Context = getContext();
18171-
return Context.getLangOpts().NativeHalfType ||
18172-
!Context.getTargetInfo().useFP16ConversionIntrinsics();
18173-
};
18174-
auto MakeLdgLdu = [&](unsigned IntrinsicID) {
18175-
Value *Ptr = EmitScalarExpr(E->getArg(0));
18176-
QualType ArgType = E->getArg(0)->getType();
18177-
clang::CharUnits Align = CGM.getNaturalPointeeTypeAlignment(ArgType);
18178-
llvm::Type *ElemTy = ConvertTypeForMem(ArgType->getPointeeType());
18179-
return Builder.CreateCall(
18180-
CGM.getIntrinsic(IntrinsicID, {ElemTy, Ptr->getType()}),
18181-
{Ptr, ConstantInt::get(Builder.getInt32Ty(), Align.getQuantity())});
18182-
};
18183-
auto MakeScopedAtomic = [&](unsigned IntrinsicID) {
18184-
Value *Ptr = EmitScalarExpr(E->getArg(0));
18185-
llvm::Type *ElemTy =
18186-
ConvertTypeForMem(E->getArg(0)->getType()->getPointeeType());
18187-
return Builder.CreateCall(
18188-
CGM.getIntrinsic(IntrinsicID, {ElemTy, Ptr->getType()}),
18189-
{Ptr, EmitScalarExpr(E->getArg(1))});
18190-
};
18220+
Value *CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID,
18221+
const CallExpr *E) {
1819118222
switch (BuiltinID) {
1819218223
case NVPTX::BI__nvvm_atom_add_gen_i:
1819318224
case NVPTX::BI__nvvm_atom_add_gen_l:
@@ -18297,22 +18328,13 @@ CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, const CallExpr *E) {
1829718328
// PTX Interoperability section 2.2: "For a vector with an even number of
1829818329
// elements, its alignment is set to number of elements times the alignment
1829918330
// of its member: n*alignof(t)."
18300-
return MakeLdgLdu(Intrinsic::nvvm_ldg_global_i);
18301-
case NVPTX::BI__nvvm_ldg_h:
18302-
case NVPTX::BI__nvvm_ldg_h2:
18303-
if (!HasHalfSupport(BuiltinID)) {
18304-
CGM.Error(E->getExprLoc(),
18305-
getContext().BuiltinInfo.getName(BuiltinID).str() +
18306-
" requires native half type support.");
18307-
return nullptr;
18308-
}
18309-
[[fallthrough]];
18331+
return MakeLdgLdu(Intrinsic::nvvm_ldg_global_i, *this, E);
1831018332
case NVPTX::BI__nvvm_ldg_f:
1831118333
case NVPTX::BI__nvvm_ldg_f2:
1831218334
case NVPTX::BI__nvvm_ldg_f4:
1831318335
case NVPTX::BI__nvvm_ldg_d:
1831418336
case NVPTX::BI__nvvm_ldg_d2:
18315-
return MakeLdgLdu(Intrinsic::nvvm_ldg_global_f);
18337+
return MakeLdgLdu(Intrinsic::nvvm_ldg_global_f, *this, E);
1831618338

1831718339
case NVPTX::BI__nvvm_ldu_c:
1831818340
case NVPTX::BI__nvvm_ldu_c2:
@@ -18338,105 +18360,96 @@ CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, const CallExpr *E) {
1833818360
case NVPTX::BI__nvvm_ldu_ul:
1833918361
case NVPTX::BI__nvvm_ldu_ull:
1834018362
case NVPTX::BI__nvvm_ldu_ull2:
18341-
return MakeLdgLdu(Intrinsic::nvvm_ldu_global_i);
18342-
case NVPTX::BI__nvvm_ldu_h:
18343-
case NVPTX::BI__nvvm_ldu_h2:
18344-
if (!HasHalfSupport(BuiltinID)) {
18345-
CGM.Error(E->getExprLoc(),
18346-
getContext().BuiltinInfo.getName(BuiltinID).str() +
18347-
" requires native half type support.");
18348-
return nullptr;
18349-
}
18350-
[[fallthrough]];
18363+
return MakeLdgLdu(Intrinsic::nvvm_ldu_global_i, *this, E);
1835118364
case NVPTX::BI__nvvm_ldu_f:
1835218365
case NVPTX::BI__nvvm_ldu_f2:
1835318366
case NVPTX::BI__nvvm_ldu_f4:
1835418367
case NVPTX::BI__nvvm_ldu_d:
1835518368
case NVPTX::BI__nvvm_ldu_d2:
18356-
return MakeLdgLdu(Intrinsic::nvvm_ldu_global_f);
18369+
return MakeLdgLdu(Intrinsic::nvvm_ldu_global_f, *this, E);
1835718370

1835818371
case NVPTX::BI__nvvm_atom_cta_add_gen_i:
1835918372
case NVPTX::BI__nvvm_atom_cta_add_gen_l:
1836018373
case NVPTX::BI__nvvm_atom_cta_add_gen_ll:
18361-
return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_i_cta);
18374+
return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_i_cta, *this, E);
1836218375
case NVPTX::BI__nvvm_atom_sys_add_gen_i:
1836318376
case NVPTX::BI__nvvm_atom_sys_add_gen_l:
1836418377
case NVPTX::BI__nvvm_atom_sys_add_gen_ll:
18365-
return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_i_sys);
18378+
return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_i_sys, *this, E);
1836618379
case NVPTX::BI__nvvm_atom_cta_add_gen_f:
1836718380
case NVPTX::BI__nvvm_atom_cta_add_gen_d:
18368-
return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_f_cta);
18381+
return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_f_cta, *this, E);
1836918382
case NVPTX::BI__nvvm_atom_sys_add_gen_f:
1837018383
case NVPTX::BI__nvvm_atom_sys_add_gen_d:
18371-
return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_f_sys);
18384+
return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_f_sys, *this, E);
1837218385
case NVPTX::BI__nvvm_atom_cta_xchg_gen_i:
1837318386
case NVPTX::BI__nvvm_atom_cta_xchg_gen_l:
1837418387
case NVPTX::BI__nvvm_atom_cta_xchg_gen_ll:
18375-
return MakeScopedAtomic(Intrinsic::nvvm_atomic_exch_gen_i_cta);
18388+
return MakeScopedAtomic(Intrinsic::nvvm_atomic_exch_gen_i_cta, *this, E);
1837618389
case NVPTX::BI__nvvm_atom_sys_xchg_gen_i:
1837718390
case NVPTX::BI__nvvm_atom_sys_xchg_gen_l:
1837818391
case NVPTX::BI__nvvm_atom_sys_xchg_gen_ll:
18379-
return MakeScopedAtomic(Intrinsic::nvvm_atomic_exch_gen_i_sys);
18392+
return MakeScopedAtomic(Intrinsic::nvvm_atomic_exch_gen_i_sys, *this, E);
1838018393
case NVPTX::BI__nvvm_atom_cta_max_gen_i:
1838118394
case NVPTX::BI__nvvm_atom_cta_max_gen_ui:
1838218395
case NVPTX::BI__nvvm_atom_cta_max_gen_l:
1838318396
case NVPTX::BI__nvvm_atom_cta_max_gen_ul:
1838418397
case NVPTX::BI__nvvm_atom_cta_max_gen_ll:
1838518398
case NVPTX::BI__nvvm_atom_cta_max_gen_ull:
18386-
return MakeScopedAtomic(Intrinsic::nvvm_atomic_max_gen_i_cta);
18399+
return MakeScopedAtomic(Intrinsic::nvvm_atomic_max_gen_i_cta, *this, E);
1838718400
case NVPTX::BI__nvvm_atom_sys_max_gen_i:
1838818401
case NVPTX::BI__nvvm_atom_sys_max_gen_ui:
1838918402
case NVPTX::BI__nvvm_atom_sys_max_gen_l:
1839018403
case NVPTX::BI__nvvm_atom_sys_max_gen_ul:
1839118404
case NVPTX::BI__nvvm_atom_sys_max_gen_ll:
1839218405
case NVPTX::BI__nvvm_atom_sys_max_gen_ull:
18393-
return MakeScopedAtomic(Intrinsic::nvvm_atomic_max_gen_i_sys);
18406+
return MakeScopedAtomic(Intrinsic::nvvm_atomic_max_gen_i_sys, *this, E);
1839418407
case NVPTX::BI__nvvm_atom_cta_min_gen_i:
1839518408
case NVPTX::BI__nvvm_atom_cta_min_gen_ui:
1839618409
case NVPTX::BI__nvvm_atom_cta_min_gen_l:
1839718410
case NVPTX::BI__nvvm_atom_cta_min_gen_ul:
1839818411
case NVPTX::BI__nvvm_atom_cta_min_gen_ll:
1839918412
case NVPTX::BI__nvvm_atom_cta_min_gen_ull:
18400-
return MakeScopedAtomic(Intrinsic::nvvm_atomic_min_gen_i_cta);
18413+
return MakeScopedAtomic(Intrinsic::nvvm_atomic_min_gen_i_cta, *this, E);
1840118414
case NVPTX::BI__nvvm_atom_sys_min_gen_i:
1840218415
case NVPTX::BI__nvvm_atom_sys_min_gen_ui:
1840318416
case NVPTX::BI__nvvm_atom_sys_min_gen_l:
1840418417
case NVPTX::BI__nvvm_atom_sys_min_gen_ul:
1840518418
case NVPTX::BI__nvvm_atom_sys_min_gen_ll:
1840618419
case NVPTX::BI__nvvm_atom_sys_min_gen_ull:
18407-
return MakeScopedAtomic(Intrinsic::nvvm_atomic_min_gen_i_sys);
18420+
return MakeScopedAtomic(Intrinsic::nvvm_atomic_min_gen_i_sys, *this, E);
1840818421
case NVPTX::BI__nvvm_atom_cta_inc_gen_ui:
18409-
return MakeScopedAtomic(Intrinsic::nvvm_atomic_inc_gen_i_cta);
18422+
return MakeScopedAtomic(Intrinsic::nvvm_atomic_inc_gen_i_cta, *this, E);
1841018423
case NVPTX::BI__nvvm_atom_cta_dec_gen_ui:
18411-
return MakeScopedAtomic(Intrinsic::nvvm_atomic_dec_gen_i_cta);
18424+
return MakeScopedAtomic(Intrinsic::nvvm_atomic_dec_gen_i_cta, *this, E);
1841218425
case NVPTX::BI__nvvm_atom_sys_inc_gen_ui:
18413-
return MakeScopedAtomic(Intrinsic::nvvm_atomic_inc_gen_i_sys);
18426+
return MakeScopedAtomic(Intrinsic::nvvm_atomic_inc_gen_i_sys, *this, E);
1841418427
case NVPTX::BI__nvvm_atom_sys_dec_gen_ui:
18415-
return MakeScopedAtomic(Intrinsic::nvvm_atomic_dec_gen_i_sys);
18428+
return MakeScopedAtomic(Intrinsic::nvvm_atomic_dec_gen_i_sys, *this, E);
1841618429
case NVPTX::BI__nvvm_atom_cta_and_gen_i:
1841718430
case NVPTX::BI__nvvm_atom_cta_and_gen_l:
1841818431
case NVPTX::BI__nvvm_atom_cta_and_gen_ll:
18419-
return MakeScopedAtomic(Intrinsic::nvvm_atomic_and_gen_i_cta);
18432+
return MakeScopedAtomic(Intrinsic::nvvm_atomic_and_gen_i_cta, *this, E);
1842018433
case NVPTX::BI__nvvm_atom_sys_and_gen_i:
1842118434
case NVPTX::BI__nvvm_atom_sys_and_gen_l:
1842218435
case NVPTX::BI__nvvm_atom_sys_and_gen_ll:
18423-
return MakeScopedAtomic(Intrinsic::nvvm_atomic_and_gen_i_sys);
18436+
return MakeScopedAtomic(Intrinsic::nvvm_atomic_and_gen_i_sys, *this, E);
1842418437
case NVPTX::BI__nvvm_atom_cta_or_gen_i:
1842518438
case NVPTX::BI__nvvm_atom_cta_or_gen_l:
1842618439
case NVPTX::BI__nvvm_atom_cta_or_gen_ll:
18427-
return MakeScopedAtomic(Intrinsic::nvvm_atomic_or_gen_i_cta);
18440+
return MakeScopedAtomic(Intrinsic::nvvm_atomic_or_gen_i_cta, *this, E);
1842818441
case NVPTX::BI__nvvm_atom_sys_or_gen_i:
1842918442
case NVPTX::BI__nvvm_atom_sys_or_gen_l:
1843018443
case NVPTX::BI__nvvm_atom_sys_or_gen_ll:
18431-
return MakeScopedAtomic(Intrinsic::nvvm_atomic_or_gen_i_sys);
18444+
return MakeScopedAtomic(Intrinsic::nvvm_atomic_or_gen_i_sys, *this, E);
1843218445
case NVPTX::BI__nvvm_atom_cta_xor_gen_i:
1843318446
case NVPTX::BI__nvvm_atom_cta_xor_gen_l:
1843418447
case NVPTX::BI__nvvm_atom_cta_xor_gen_ll:
18435-
return MakeScopedAtomic(Intrinsic::nvvm_atomic_xor_gen_i_cta);
18448+
return MakeScopedAtomic(Intrinsic::nvvm_atomic_xor_gen_i_cta, *this, E);
1843618449
case NVPTX::BI__nvvm_atom_sys_xor_gen_i:
1843718450
case NVPTX::BI__nvvm_atom_sys_xor_gen_l:
1843818451
case NVPTX::BI__nvvm_atom_sys_xor_gen_ll:
18439-
return MakeScopedAtomic(Intrinsic::nvvm_atomic_xor_gen_i_sys);
18452+
return MakeScopedAtomic(Intrinsic::nvvm_atomic_xor_gen_i_sys, *this, E);
1844018453
case NVPTX::BI__nvvm_atom_cta_cas_gen_i:
1844118454
case NVPTX::BI__nvvm_atom_cta_cas_gen_l:
1844218455
case NVPTX::BI__nvvm_atom_cta_cas_gen_ll: {
@@ -18701,6 +18714,138 @@ CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, const CallExpr *E) {
1870118714
CharUnits::fromQuantity(4));
1870218715
return Result;
1870318716
}
18717+
// The following builtins require half type support
18718+
case NVPTX::BI__nvvm_ex2_approx_f16:
18719+
return MakeHalfType(Intrinsic::nvvm_ex2_approx_f16, BuiltinID, E, *this);
18720+
case NVPTX::BI__nvvm_ex2_approx_f16x2:
18721+
return MakeHalfType(Intrinsic::nvvm_ex2_approx_f16x2, BuiltinID, E, *this);
18722+
case NVPTX::BI__nvvm_ff2f16x2_rn:
18723+
return MakeHalfType(Intrinsic::nvvm_ff2f16x2_rn, BuiltinID, E, *this);
18724+
case NVPTX::BI__nvvm_ff2f16x2_rn_relu:
18725+
return MakeHalfType(Intrinsic::nvvm_ff2f16x2_rn_relu, BuiltinID, E, *this);
18726+
case NVPTX::BI__nvvm_ff2f16x2_rz:
18727+
return MakeHalfType(Intrinsic::nvvm_ff2f16x2_rz, BuiltinID, E, *this);
18728+
case NVPTX::BI__nvvm_ff2f16x2_rz_relu:
18729+
return MakeHalfType(Intrinsic::nvvm_ff2f16x2_rz_relu, BuiltinID, E, *this);
18730+
case NVPTX::BI__nvvm_fma_rn_f16:
18731+
return MakeHalfType(Intrinsic::nvvm_fma_rn_f16, BuiltinID, E, *this);
18732+
case NVPTX::BI__nvvm_fma_rn_f16x2:
18733+
return MakeHalfType(Intrinsic::nvvm_fma_rn_f16x2, BuiltinID, E, *this);
18734+
case NVPTX::BI__nvvm_fma_rn_ftz_f16:
18735+
return MakeHalfType(Intrinsic::nvvm_fma_rn_ftz_f16, BuiltinID, E, *this);
18736+
case NVPTX::BI__nvvm_fma_rn_ftz_f16x2:
18737+
return MakeHalfType(Intrinsic::nvvm_fma_rn_ftz_f16x2, BuiltinID, E, *this);
18738+
case NVPTX::BI__nvvm_fma_rn_ftz_relu_f16:
18739+
return MakeHalfType(Intrinsic::nvvm_fma_rn_ftz_relu_f16, BuiltinID, E,
18740+
*this);
18741+
case NVPTX::BI__nvvm_fma_rn_ftz_relu_f16x2:
18742+
return MakeHalfType(Intrinsic::nvvm_fma_rn_ftz_relu_f16x2, BuiltinID, E,
18743+
*this);
18744+
case NVPTX::BI__nvvm_fma_rn_ftz_sat_f16:
18745+
return MakeHalfType(Intrinsic::nvvm_fma_rn_ftz_sat_f16, BuiltinID, E,
18746+
*this);
18747+
case NVPTX::BI__nvvm_fma_rn_ftz_sat_f16x2:
18748+
return MakeHalfType(Intrinsic::nvvm_fma_rn_ftz_sat_f16x2, BuiltinID, E,
18749+
*this);
18750+
case NVPTX::BI__nvvm_fma_rn_relu_f16:
18751+
return MakeHalfType(Intrinsic::nvvm_fma_rn_relu_f16, BuiltinID, E, *this);
18752+
case NVPTX::BI__nvvm_fma_rn_relu_f16x2:
18753+
return MakeHalfType(Intrinsic::nvvm_fma_rn_relu_f16x2, BuiltinID, E, *this);
18754+
case NVPTX::BI__nvvm_fma_rn_sat_f16:
18755+
return MakeHalfType(Intrinsic::nvvm_fma_rn_sat_f16, BuiltinID, E, *this);
18756+
case NVPTX::BI__nvvm_fma_rn_sat_f16x2:
18757+
return MakeHalfType(Intrinsic::nvvm_fma_rn_sat_f16x2, BuiltinID, E, *this);
18758+
case NVPTX::BI__nvvm_fmax_f16:
18759+
return MakeHalfType(Intrinsic::nvvm_fmax_f16, BuiltinID, E, *this);
18760+
case NVPTX::BI__nvvm_fmax_f16x2:
18761+
return MakeHalfType(Intrinsic::nvvm_fmax_f16x2, BuiltinID, E, *this);
18762+
case NVPTX::BI__nvvm_fmax_ftz_f16:
18763+
return MakeHalfType(Intrinsic::nvvm_fmax_ftz_f16, BuiltinID, E, *this);
18764+
case NVPTX::BI__nvvm_fmax_ftz_f16x2:
18765+
return MakeHalfType(Intrinsic::nvvm_fmax_ftz_f16x2, BuiltinID, E, *this);
18766+
case NVPTX::BI__nvvm_fmax_ftz_nan_f16:
18767+
return MakeHalfType(Intrinsic::nvvm_fmax_ftz_nan_f16, BuiltinID, E, *this);
18768+
case NVPTX::BI__nvvm_fmax_ftz_nan_f16x2:
18769+
return MakeHalfType(Intrinsic::nvvm_fmax_ftz_nan_f16x2, BuiltinID, E,
18770+
*this);
18771+
case NVPTX::BI__nvvm_fmax_ftz_nan_xorsign_abs_f16:
18772+
return MakeHalfType(Intrinsic::nvvm_fmax_ftz_nan_xorsign_abs_f16, BuiltinID,
18773+
E, *this);
18774+
case NVPTX::BI__nvvm_fmax_ftz_nan_xorsign_abs_f16x2:
18775+
return MakeHalfType(Intrinsic::nvvm_fmax_ftz_nan_xorsign_abs_f16x2,
18776+
BuiltinID, E, *this);
18777+
case NVPTX::BI__nvvm_fmax_ftz_xorsign_abs_f16:
18778+
return MakeHalfType(Intrinsic::nvvm_fmax_ftz_xorsign_abs_f16, BuiltinID, E,
18779+
*this);
18780+
case NVPTX::BI__nvvm_fmax_ftz_xorsign_abs_f16x2:
18781+
return MakeHalfType(Intrinsic::nvvm_fmax_ftz_xorsign_abs_f16x2, BuiltinID,
18782+
E, *this);
18783+
case NVPTX::BI__nvvm_fmax_nan_f16:
18784+
return MakeHalfType(Intrinsic::nvvm_fmax_nan_f16, BuiltinID, E, *this);
18785+
case NVPTX::BI__nvvm_fmax_nan_f16x2:
18786+
return MakeHalfType(Intrinsic::nvvm_fmax_nan_f16x2, BuiltinID, E, *this);
18787+
case NVPTX::BI__nvvm_fmax_nan_xorsign_abs_f16:
18788+
return MakeHalfType(Intrinsic::nvvm_fmax_nan_xorsign_abs_f16, BuiltinID, E,
18789+
*this);
18790+
case NVPTX::BI__nvvm_fmax_nan_xorsign_abs_f16x2:
18791+
return MakeHalfType(Intrinsic::nvvm_fmax_nan_xorsign_abs_f16x2, BuiltinID,
18792+
E, *this);
18793+
case NVPTX::BI__nvvm_fmax_xorsign_abs_f16:
18794+
return MakeHalfType(Intrinsic::nvvm_fmax_xorsign_abs_f16, BuiltinID, E,
18795+
*this);
18796+
case NVPTX::BI__nvvm_fmax_xorsign_abs_f16x2:
18797+
return MakeHalfType(Intrinsic::nvvm_fmax_xorsign_abs_f16x2, BuiltinID, E,
18798+
*this);
18799+
case NVPTX::BI__nvvm_fmin_f16:
18800+
return MakeHalfType(Intrinsic::nvvm_fmin_f16, BuiltinID, E, *this);
18801+
case NVPTX::BI__nvvm_fmin_f16x2:
18802+
return MakeHalfType(Intrinsic::nvvm_fmin_f16x2, BuiltinID, E, *this);
18803+
case NVPTX::BI__nvvm_fmin_ftz_f16:
18804+
return MakeHalfType(Intrinsic::nvvm_fmin_ftz_f16, BuiltinID, E, *this);
18805+
case NVPTX::BI__nvvm_fmin_ftz_f16x2:
18806+
return MakeHalfType(Intrinsic::nvvm_fmin_ftz_f16x2, BuiltinID, E, *this);
18807+
case NVPTX::BI__nvvm_fmin_ftz_nan_f16:
18808+
return MakeHalfType(Intrinsic::nvvm_fmin_ftz_nan_f16, BuiltinID, E, *this);
18809+
case NVPTX::BI__nvvm_fmin_ftz_nan_f16x2:
18810+
return MakeHalfType(Intrinsic::nvvm_fmin_ftz_nan_f16x2, BuiltinID, E,
18811+
*this);
18812+
case NVPTX::BI__nvvm_fmin_ftz_nan_xorsign_abs_f16:
18813+
return MakeHalfType(Intrinsic::nvvm_fmin_ftz_nan_xorsign_abs_f16, BuiltinID,
18814+
E, *this);
18815+
case NVPTX::BI__nvvm_fmin_ftz_nan_xorsign_abs_f16x2:
18816+
return MakeHalfType(Intrinsic::nvvm_fmin_ftz_nan_xorsign_abs_f16x2,
18817+
BuiltinID, E, *this);
18818+
case NVPTX::BI__nvvm_fmin_ftz_xorsign_abs_f16:
18819+
return MakeHalfType(Intrinsic::nvvm_fmin_ftz_xorsign_abs_f16, BuiltinID, E,
18820+
*this);
18821+
case NVPTX::BI__nvvm_fmin_ftz_xorsign_abs_f16x2:
18822+
return MakeHalfType(Intrinsic::nvvm_fmin_ftz_xorsign_abs_f16x2, BuiltinID,
18823+
E, *this);
18824+
case NVPTX::BI__nvvm_fmin_nan_f16:
18825+
return MakeHalfType(Intrinsic::nvvm_fmin_nan_f16, BuiltinID, E, *this);
18826+
case NVPTX::BI__nvvm_fmin_nan_f16x2:
18827+
return MakeHalfType(Intrinsic::nvvm_fmin_nan_f16x2, BuiltinID, E, *this);
18828+
case NVPTX::BI__nvvm_fmin_nan_xorsign_abs_f16:
18829+
return MakeHalfType(Intrinsic::nvvm_fmin_nan_xorsign_abs_f16, BuiltinID, E,
18830+
*this);
18831+
case NVPTX::BI__nvvm_fmin_nan_xorsign_abs_f16x2:
18832+
return MakeHalfType(Intrinsic::nvvm_fmin_nan_xorsign_abs_f16x2, BuiltinID,
18833+
E, *this);
18834+
case NVPTX::BI__nvvm_fmin_xorsign_abs_f16:
18835+
return MakeHalfType(Intrinsic::nvvm_fmin_xorsign_abs_f16, BuiltinID, E,
18836+
*this);
18837+
case NVPTX::BI__nvvm_fmin_xorsign_abs_f16x2:
18838+
return MakeHalfType(Intrinsic::nvvm_fmin_xorsign_abs_f16x2, BuiltinID, E,
18839+
*this);
18840+
case NVPTX::BI__nvvm_ldg_h:
18841+
return MakeHalfType(Intrinsic::nvvm_ldg_global_f, BuiltinID, E, *this);
18842+
case NVPTX::BI__nvvm_ldg_h2:
18843+
return MakeHalfType(Intrinsic::nvvm_ldg_global_f, BuiltinID, E, *this);
18844+
case NVPTX::BI__nvvm_ldu_h:
18845+
return MakeHalfType(Intrinsic::nvvm_ldu_global_f, BuiltinID, E, *this);
18846+
case NVPTX::BI__nvvm_ldu_h2: {
18847+
return MakeHalfType(Intrinsic::nvvm_ldu_global_f, BuiltinID, E, *this);
18848+
}
1870418849
default:
1870518850
return nullptr;
1870618851
}

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