Skip to content

Commit ae5084c

Browse files
committed
[test] Pre-commit llvm.experimental.memset.pattern tests prior to MemoryLocation changes
The next patch will teach MemoryLocation about llvm.experimental.memset.pattern.
1 parent f8d2704 commit ae5084c

File tree

2 files changed

+83
-0
lines changed

2 files changed

+83
-0
lines changed
Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
; RUN: opt -mtriple=x86_64 -aa-pipeline=basic-aa -passes=inferattrs,aa-eval -print-all-alias-modref-info -disable-output 2>&1 %s | FileCheck %s
2+
3+
define void @test_memset_pattern4_const_size(ptr noalias %a, i32 %pattern) {
4+
; CHECK-LABEL: Function: test_memset_pattern4_const_size
5+
; CHECK: Just Mod: Ptr: i8* %a <-> call void @llvm.experimental.memset.pattern.p0.i32.i64(ptr %a, i32 %pattern, i64 17, i1 false)
6+
; CHECK-NEXT: Just Mod: Ptr: i8* %a.gep.1 <-> call void @llvm.experimental.memset.pattern.p0.i32.i64(ptr %a, i32 %pattern, i64 17, i1 false)
7+
; CHECK-NEXT: Just Mod: Ptr: i8* %a.gep.129 <-> call void @llvm.experimental.memset.pattern.p0.i32.i64(ptr %a, i32 %pattern, i64 17, i1 false)
8+
9+
entry:
10+
load i8, ptr %a
11+
call void @llvm.experimental.memset.pattern(ptr %a, i32 %pattern, i64 17, i1 0)
12+
%a.gep.1 = getelementptr i8, ptr %a, i32 1
13+
store i8 0, ptr %a.gep.1
14+
%a.gep.129 = getelementptr i8, ptr %a, i32 129
15+
store i8 1, ptr %a.gep.129
16+
17+
ret void
18+
}

llvm/test/Transforms/DeadStoreElimination/memory-intrinsics-sizes.ll

Lines changed: 65 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -66,6 +66,71 @@ define void @memset_and_store_2(ptr %ptr, i64 %len) {
6666
ret void
6767
}
6868

69+
define void @memset_pattern_equal_size_values(ptr %ptr, i64 %len) {
70+
; CHECK-LABEL: @memset_pattern_equal_size_values(
71+
; CHECK-NEXT: call void @llvm.experimental.memset.pattern.p0.i8.i64(ptr align 1 [[PTR:%.*]], i8 0, i64 [[LEN:%.*]], i1 false)
72+
; CHECK-NEXT: ret void
73+
;
74+
call void @llvm.experimental.memset.pattern.p0.i8.i64(ptr align 1 %ptr, i8 0, i64 %len, i1 false)
75+
call void @llvm.experimental.memset.pattern.p0.i8.i64(ptr align 1 %ptr, i8 0, i64 %len, i1 false)
76+
ret void
77+
}
78+
79+
define void @memset_pattern_different_size_values_1(ptr %ptr, i64 %len.1, i64 %len.2) {
80+
; CHECK-LABEL: @memset_pattern_different_size_values_1(
81+
; CHECK-NEXT: call void @llvm.experimental.memset.pattern.p0.i8.i64(ptr align 1 [[PTR:%.*]], i8 0, i64 [[LEN_1:%.*]], i1 false)
82+
; CHECK-NEXT: call void @llvm.experimental.memset.pattern.p0.i8.i64(ptr align 1 [[PTR]], i8 0, i64 [[LEN_2:%.*]], i1 false)
83+
; CHECK-NEXT: ret void
84+
;
85+
call void @llvm.experimental.memset.pattern.p0.i8.i64(ptr align 1 %ptr, i8 0, i64 %len.1, i1 false)
86+
call void @llvm.experimental.memset.pattern.p0.i8.i64(ptr align 1 %ptr, i8 0, i64 %len.2, i1 false)
87+
ret void
88+
}
89+
90+
define void @memset_pattern_different_size_values_2(ptr %ptr, i64 %len) {
91+
; CHECK-LABEL: @memset_pattern_different_size_values_2(
92+
; CHECK-NEXT: call void @llvm.experimental.memset.pattern.p0.i8.i64(ptr align 1 [[PTR:%.*]], i8 0, i64 [[LEN:%.*]], i1 false)
93+
; CHECK-NEXT: call void @llvm.experimental.memset.pattern.p0.i8.i64(ptr align 1 [[PTR]], i8 0, i64 100, i1 false)
94+
; CHECK-NEXT: ret void
95+
;
96+
call void @llvm.experimental.memset.pattern.p0.i8.i64(ptr align 1 %ptr, i8 0, i64 %len, i1 false)
97+
call void @llvm.experimental.memset.pattern.p0.i8.i64(ptr align 1 %ptr, i8 0, i64 100, i1 false)
98+
ret void
99+
}
100+
101+
define void @memset_pattern_different_size_values_3(ptr %ptr, i64 %len) {
102+
; CHECK-LABEL: @memset_pattern_different_size_values_3(
103+
; CHECK-NEXT: call void @llvm.experimental.memset.pattern.p0.i8.i64(ptr align 1 [[PTR:%.*]], i8 0, i64 100, i1 false)
104+
; CHECK-NEXT: call void @llvm.experimental.memset.pattern.p0.i8.i64(ptr align 1 [[PTR]], i8 0, i64 [[LEN:%.*]], i1 false)
105+
; CHECK-NEXT: ret void
106+
;
107+
call void @llvm.experimental.memset.pattern.p0.i8.i64(ptr align 1 %ptr, i8 0, i64 100, i1 false)
108+
call void @llvm.experimental.memset.pattern.p0.i8.i64(ptr align 1 %ptr, i8 0, i64 %len, i1 false)
109+
ret void
110+
}
111+
112+
define void @memset_pattern_and_store_1(ptr %ptr, i64 %len) {
113+
; CHECK-LABEL: @memset_pattern_and_store_1(
114+
; CHECK-NEXT: store i64 123, ptr [[PTR:%.*]], align 4
115+
; CHECK-NEXT: call void @llvm.experimental.memset.pattern.p0.i8.i64(ptr align 1 [[PTR]], i8 0, i64 [[LEN:%.*]], i1 false)
116+
; CHECK-NEXT: ret void
117+
;
118+
store i64 123, ptr %ptr
119+
call void @llvm.experimental.memset.pattern.p0.i8.i64(ptr align 1 %ptr, i8 0, i64 %len, i1 false)
120+
ret void
121+
}
122+
123+
define void @memset_pattern_and_store_2(ptr %ptr, i64 %len) {
124+
; CHECK-LABEL: @memset_pattern_and_store_2(
125+
; CHECK-NEXT: call void @llvm.experimental.memset.pattern.p0.i8.i64(ptr align 1 [[PTR:%.*]], i8 0, i64 [[LEN:%.*]], i1 false)
126+
; CHECK-NEXT: store i64 123, ptr [[PTR]], align 4
127+
; CHECK-NEXT: ret void
128+
;
129+
call void @llvm.experimental.memset.pattern.p0.i8.i64(ptr align 1 %ptr, i8 0, i64 %len, i1 false)
130+
store i64 123, ptr %ptr
131+
ret void
132+
}
133+
69134
define void @memcpy_equal_size_values(ptr noalias %src, ptr noalias %dst, i64 %len) {
70135
; CHECK-LABEL: @memcpy_equal_size_values(
71136
; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr [[DST:%.*]], ptr [[SRC:%.*]], i64 [[LEN:%.*]], i1 false)

0 commit comments

Comments
 (0)