Skip to content

Commit ae82b9b

Browse files
committed
Addressed review comments.
1 parent 5259af3 commit ae82b9b

File tree

2 files changed

+13
-13
lines changed

2 files changed

+13
-13
lines changed

llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -186,10 +186,13 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST)
186186
}
187187

188188
auto &ConstantActions = getActionDefinitionsBuilder(G_CONSTANT);
189+
ConstantActions
190+
.legalFor({s32, p0})
189191
if (ST.is64Bit())
190192
ConstantActions.customFor({s64});
191-
ConstantActions.legalFor({s32, p0}).widenScalarToNextPow2(0).clampScalar(
192-
0, s32, sXLen);
193+
ConstantActions
194+
.widenScalarToNextPow2(0)
195+
.clampScalar(0, s32, sXLen);
193196

194197
getActionDefinitionsBuilder(G_IMPLICIT_DEF)
195198
.legalFor({s32, sXLen, p0})
@@ -461,10 +464,10 @@ bool RISCVLegalizerInfo::legalizeVAStart(MachineInstr &MI,
461464
}
462465

463466
bool RISCVLegalizerInfo::shouldBeInConstantPool(APInt APImm,
464-
bool shouldOptForSize) const {
467+
bool ShouldOptForSize) const {
465468
unsigned BitWidth = APImm.getBitWidth();
466469
assert(BitWidth == 32 || BitWidth == 64);
467-
uint64_t Imm = APImm.getZExtValue();
470+
uint64_t Imm = APImm.getSExtValue();
468471
// All simm32 constants should be handled by isel.
469472
// NOTE: The getMaxBuildIntsCost call below should return a value >= 2 making
470473
// this check redundant, but small immediates are common so this check
@@ -482,7 +485,7 @@ bool RISCVLegalizerInfo::shouldBeInConstantPool(APInt APImm,
482485

483486
// Optimizations below are disabled for opt size. If we're optimizing for
484487
// size, use a constant pool.
485-
if (shouldOptForSize)
488+
if (ShouldOptForSize)
486489
return true;
487490
//
488491
// Special case. See if we can build the constant as (ADD (SLLI X, C), X) do
@@ -493,10 +496,7 @@ bool RISCVLegalizerInfo::shouldBeInConstantPool(APInt APImm,
493496
unsigned ShiftAmt, AddOpc;
494497
RISCVMatInt::InstSeq SeqLo =
495498
RISCVMatInt::generateTwoRegInstSeq(Imm, STI, ShiftAmt, AddOpc);
496-
if (!SeqLo.empty() && (SeqLo.size() + 2) <= STI.getMaxBuildIntsCost())
497-
return false;
498-
499-
return true;
499+
return !(!SeqLo.empty() && (SeqLo.size() + 2) <= STI.getMaxBuildIntsCost());
500500
}
501501

502502
// TODO: This is almost the same as LegalizerHelper::lowerFConstant and is
@@ -512,7 +512,7 @@ bool RISCVLegalizerInfo::emitLoadFromConstantPool(
512512
LLT AddrPtrTy = LLT::pointer(AddrSpace, DL.getPointerSizeInBits(AddrSpace));
513513
LLT DstLLT = MRI.getType(DstReg);
514514

515-
Align Alignment = Align(DL.getABITypeAlign(getTypeForLLT(DstLLT, Ctx)));
515+
Align Alignment(DL.getABITypeAlign(getTypeForLLT(DstLLT, Ctx)));
516516

517517
auto Addr = MIRBuilder.buildConstantPool(
518518
AddrPtrTy,
@@ -542,9 +542,9 @@ bool RISCVLegalizerInfo::legalizeCustom(
542542
const Function &F = MF.getFunction();
543543
// TODO: if PSI and BFI are present, add " ||
544544
// llvm::shouldOptForSize(*CurMBB, PSI, BFI)".
545-
bool shouldOptForSize = F.hasOptSize() || F.hasMinSize();
545+
bool ShouldOptForSize = F.hasOptSize() || F.hasMinSize();
546546
const ConstantInt *ConstVal = MI.getOperand(1).getCImm();
547-
if (!shouldBeInConstantPool(ConstVal->getValue(), shouldOptForSize))
547+
if (!shouldBeInConstantPool(ConstVal->getValue(), ShouldOptForSize))
548548
return true;
549549
emitLoadFromConstantPool(MI.getOperand(0).getReg(),
550550
MI.getOperand(1).getCImm(), MIRBuilder);

llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -37,7 +37,7 @@ class RISCVLegalizerInfo : public LegalizerInfo {
3737
MachineInstr &MI) const override;
3838

3939
private:
40-
bool shouldBeInConstantPool(APInt APImm, bool shouldOptForSize) const;
40+
bool shouldBeInConstantPool(APInt APImm, bool ShouldOptForSize) const;
4141
bool emitLoadFromConstantPool(Register DstReg, const Constant *CPVal,
4242
MachineIRBuilder &MIRBuilder) const;
4343
bool legalizeShlAshrLshr(MachineInstr &MI, MachineIRBuilder &MIRBuilder,

0 commit comments

Comments
 (0)