@@ -163,11 +163,9 @@ class LoongArchAsmParser : public MCTargetAsmParser {
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void emitLoadAddressTLSGDLarge (MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
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// Helper to emit pseudo instruction "la.tls.desc $rd, sym".
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- void emitLoadAddressTLSDescAbs (MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
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- void emitLoadAddressTLSDescPcrel (MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
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+ void emitLoadAddressTLSDesc (MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
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// Helper to emit pseudo instruction "la.tls.desc $rd, $rj, sym".
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- void emitLoadAddressTLSDescPcrelLarge (MCInst &Inst, SMLoc IDLoc,
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- MCStreamer &Out);
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+ void emitLoadAddressTLSDescLarge (MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
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// Helper to emit pseudo instruction "li.w/d $rd, $imm".
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void emitLoadImm (MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
@@ -1023,14 +1021,42 @@ void LoongArchAsmParser::emitLoadAddressPcrelLarge(MCInst &Inst, SMLoc IDLoc,
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void LoongArchAsmParser::emitLoadAddressGot (MCInst &Inst, SMLoc IDLoc,
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MCStreamer &Out) {
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// la.got $rd, sym
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- // expands to:
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- // pcalau12i $rd, %got_pc_hi20(sym)
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- // ld.w/d $rd, $rd, %got_pc_lo12(sym)
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MCRegister DestReg = Inst.getOperand (0 ).getReg ();
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const MCExpr *Symbol = Inst.getOperand (1 ).getExpr ();
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InstSeq Insts;
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unsigned LD = is64Bit () ? LoongArch::LD_D : LoongArch::LD_W;
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+ if (getSTI ().hasFeature (LoongArch::LaGlobalWithAbs)) {
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+ // with feature: +la-glabal-with-abs
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+ // for 32bit:
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+ // lu12i.w $rd, %got_hi20(sym)
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+ // ori $rd, $rd, %got_lo12(sym)
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+ // ld.w $rd, $rd, 0
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+ //
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+ // for 64bit:
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+ // lu12i.w $rd, %got_hi20(sym)
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+ // ori $rd, $rd, %got_lo12(sym)
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+ // lu32i.d $rd, %got64_lo20(sym)
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+ // lu52i.d $rd, $rd, %got64_hi12(sym)
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+ // ld.d $rd, $rd, 0
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+ Insts.push_back (LoongArchAsmParser::Inst (
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+ LoongArch::LU12I_W, LoongArchMCExpr::VK_LoongArch_GOT_HI20));
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+ Insts.push_back (LoongArchAsmParser::Inst (
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+ LoongArch::ORI, LoongArchMCExpr::VK_LoongArch_GOT_LO12));
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+
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+ if (is64Bit ()) {
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+ Insts.push_back (LoongArchAsmParser::Inst (
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+ LoongArch::LU32I_D, LoongArchMCExpr::VK_LoongArch_GOT64_LO20));
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+ Insts.push_back (LoongArchAsmParser::Inst (
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+ LoongArch::LU52I_D, LoongArchMCExpr::VK_LoongArch_GOT64_HI12));
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+ }
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+ Insts.push_back (LoongArchAsmParser::Inst (LD));
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+ emitLAInstSeq (DestReg, DestReg, Symbol, Insts, IDLoc, Out);
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+ return ;
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+ }
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+ // expands to:
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+ // pcalau12i $rd, %got_pc_hi20(sym)
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+ // ld.w/d $rd, $rd, %got_pc_lo12(sym)
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Insts.push_back (LoongArchAsmParser::Inst (
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LoongArch::PCALAU12I, LoongArchMCExpr::VK_LoongArch_GOT_PC_HI20));
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Insts.push_back (
@@ -1087,14 +1113,43 @@ void LoongArchAsmParser::emitLoadAddressTLSLE(MCInst &Inst, SMLoc IDLoc,
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void LoongArchAsmParser::emitLoadAddressTLSIE (MCInst &Inst, SMLoc IDLoc,
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MCStreamer &Out) {
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// la.tls.ie $rd, sym
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- // expands to:
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- // pcalau12i $rd, %ie_pc_hi20(sym)
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- // ld.w/d $rd, $rd, %ie_pc_lo12(sym)
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MCRegister DestReg = Inst.getOperand (0 ).getReg ();
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const MCExpr *Symbol = Inst.getOperand (1 ).getExpr ();
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InstSeq Insts;
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unsigned LD = is64Bit () ? LoongArch::LD_D : LoongArch::LD_W;
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+ if (getSTI ().hasFeature (LoongArch::LaGlobalWithAbs)) {
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+ // with feature: +la-glabal-with-abs
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+ // for 32bit:
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+ // lu12i.w $rd, %ie_hi20(sym)
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+ // ori $rd, $rd, %ie_lo12(sym)
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+ // ld.w $rd, $rd, 0
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+ //
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+ // for 64bit:
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+ // lu12i.w $rd, %ie_hi20(sym)
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+ // ori $rd, $rd, %ie_lo12(sym)
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+ // lu32i.d $rd, %ie64_lo20(sym)
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+ // lu52i.d $rd, $rd, %ie64_hi12(sym)
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+ // ld.d $rd, $rd, 0
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+ Insts.push_back (LoongArchAsmParser::Inst (
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+ LoongArch::LU12I_W, LoongArchMCExpr::VK_LoongArch_TLS_IE_HI20));
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+ Insts.push_back (LoongArchAsmParser::Inst (
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+ LoongArch::ORI, LoongArchMCExpr::VK_LoongArch_TLS_IE_LO12));
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+
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+ if (is64Bit ()) {
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+ Insts.push_back (LoongArchAsmParser::Inst (
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+ LoongArch::LU32I_D, LoongArchMCExpr::VK_LoongArch_TLS_IE64_LO20));
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+ Insts.push_back (LoongArchAsmParser::Inst (
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+ LoongArch::LU52I_D, LoongArchMCExpr::VK_LoongArch_TLS_IE64_HI12));
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+ }
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+ Insts.push_back (LoongArchAsmParser::Inst (LD));
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+ emitLAInstSeq (DestReg, DestReg, Symbol, Insts, IDLoc, Out);
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+ return ;
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+ }
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+
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+ // expands to:
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+ // pcalau12i $rd, %ie_pc_hi20(sym)
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+ // ld.w/d $rd, $rd, %ie_pc_lo12(sym)
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Insts.push_back (LoongArchAsmParser::Inst (
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LoongArch::PCALAU12I, LoongArchMCExpr::VK_LoongArch_TLS_IE_PC_HI20));
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Insts.push_back (LoongArchAsmParser::Inst (
@@ -1133,14 +1188,40 @@ void LoongArchAsmParser::emitLoadAddressTLSIELarge(MCInst &Inst, SMLoc IDLoc,
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void LoongArchAsmParser::emitLoadAddressTLSLD (MCInst &Inst, SMLoc IDLoc,
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MCStreamer &Out) {
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// la.tls.ld $rd, sym
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- // expands to:
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- // pcalau12i $rd, %ld_pc_hi20(sym)
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- // addi.w/d $rd, $rd, %got_pc_lo12(sym)
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MCRegister DestReg = Inst.getOperand (0 ).getReg ();
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const MCExpr *Symbol = Inst.getOperand (1 ).getExpr ();
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InstSeq Insts;
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unsigned ADDI = is64Bit () ? LoongArch::ADDI_D : LoongArch::ADDI_W;
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+ if (getSTI ().hasFeature (LoongArch::LaGlobalWithAbs)) {
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+ // with feature: +la-glabal-with-abs
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+ // for 32bit:
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+ // lu12i.w $rd, %ld_hi20(sym)
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+ // ori $rd, $rd, %got_lo12(sym)
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+ //
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+ // for 64bit:
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+ // lu12i.w $rd, %ld_hi20(sym)
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+ // ori $rd, $rd, %got_lo12(sym)
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+ // lu32i.d $rd, %got64_lo20(sym)
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+ // lu52i.d $rd, $rd, %got64_hi12(sym)
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+ Insts.push_back (LoongArchAsmParser::Inst (
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+ LoongArch::LU12I_W, LoongArchMCExpr::VK_LoongArch_TLS_LD_HI20));
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+ Insts.push_back (LoongArchAsmParser::Inst (
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+ LoongArch::ORI, LoongArchMCExpr::VK_LoongArch_GOT_LO12));
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+
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+ if (is64Bit ()) {
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+ Insts.push_back (LoongArchAsmParser::Inst (
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+ LoongArch::LU32I_D, LoongArchMCExpr::VK_LoongArch_GOT64_LO20));
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+ Insts.push_back (LoongArchAsmParser::Inst (
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+ LoongArch::LU52I_D, LoongArchMCExpr::VK_LoongArch_GOT64_HI12));
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+ }
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+ emitLAInstSeq (DestReg, DestReg, Symbol, Insts, IDLoc, Out);
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+ return ;
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+ }
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+
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+ // expands to:
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+ // pcalau12i $rd, %ld_pc_hi20(sym)
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+ // addi.w/d $rd, $rd, %got_pc_lo12(sym)
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Insts.push_back (LoongArchAsmParser::Inst (
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LoongArch::PCALAU12I, LoongArchMCExpr::VK_LoongArch_TLS_LD_PC_HI20));
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Insts.push_back (LoongArchAsmParser::Inst (
@@ -1179,14 +1260,40 @@ void LoongArchAsmParser::emitLoadAddressTLSLDLarge(MCInst &Inst, SMLoc IDLoc,
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void LoongArchAsmParser::emitLoadAddressTLSGD (MCInst &Inst, SMLoc IDLoc,
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MCStreamer &Out) {
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// la.tls.gd $rd, sym
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- // expands to:
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- // pcalau12i $rd, %gd_pc_hi20(sym)
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- // addi.w/d $rd, $rd, %got_pc_lo12(sym)
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MCRegister DestReg = Inst.getOperand (0 ).getReg ();
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const MCExpr *Symbol = Inst.getOperand (1 ).getExpr ();
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InstSeq Insts;
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unsigned ADDI = is64Bit () ? LoongArch::ADDI_D : LoongArch::ADDI_W;
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+ if (getSTI ().hasFeature (LoongArch::LaGlobalWithAbs)) {
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+ // with feature: +la-glabal-with-abs
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+ // for 32bit:
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+ // lu12i.w $rd, %gd_hi20(sym)
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+ // ori $rd, $rd, %got_lo12(sym)
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+ //
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+ // for 64bit:
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+ // lu12i.w $rd, %gd_hi20(sym)
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+ // ori $rd, $rd, %got_lo12(sym)
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+ // lu32i.d $rd, %got64_lo20(sym)
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+ // lu52i.d $rd, $rd, %got64_hi12(sym)
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+ Insts.push_back (LoongArchAsmParser::Inst (
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+ LoongArch::LU12I_W, LoongArchMCExpr::VK_LoongArch_TLS_GD_HI20));
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+ Insts.push_back (LoongArchAsmParser::Inst (
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+ LoongArch::ORI, LoongArchMCExpr::VK_LoongArch_GOT_LO12));
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+
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+ if (is64Bit ()) {
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+ Insts.push_back (LoongArchAsmParser::Inst (
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+ LoongArch::LU32I_D, LoongArchMCExpr::VK_LoongArch_GOT64_LO20));
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+ Insts.push_back (LoongArchAsmParser::Inst (
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+ LoongArch::LU52I_D, LoongArchMCExpr::VK_LoongArch_GOT64_HI12));
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+ }
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+ emitLAInstSeq (DestReg, DestReg, Symbol, Insts, IDLoc, Out);
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+ return ;
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+ }
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+
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+ // expands to:
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+ // pcalau12i $rd, %gd_pc_hi20(sym)
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+ // addi.w/d $rd, $rd, %got_pc_lo12(sym)
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Insts.push_back (LoongArchAsmParser::Inst (
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LoongArch::PCALAU12I, LoongArchMCExpr::VK_LoongArch_TLS_GD_PC_HI20));
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Insts.push_back (LoongArchAsmParser::Inst (
@@ -1222,63 +1329,56 @@ void LoongArchAsmParser::emitLoadAddressTLSGDLarge(MCInst &Inst, SMLoc IDLoc,
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emitLAInstSeq (DestReg, TmpReg, Symbol, Insts, IDLoc, Out);
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}
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- void LoongArchAsmParser::emitLoadAddressTLSDescAbs (MCInst &Inst, SMLoc IDLoc,
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- MCStreamer &Out) {
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- // `la.tls.desc $rd, sym` with `la-global-with-abs` feature
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- // for la32 expands to:
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- // lu12i.w $rd, %desc_hi20(sym)
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- // ori $rd, $rd, %desc_lo12(sym)
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- // ld.w $ra, $rd, %desc_ld(sym)
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- // jirl $ra, $ra, %desc_call(sym)
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- //
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- // for la64 expands to:
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- // lu12i.w $rd, %desc_hi20(sym)
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- // ori $rd, $rd, %desc_lo12(sym)
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- // lu32i.d $rd, %desc64_lo20(sym)
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- // lu52i.d $rd, $rd, %desc64_hi12(sym)
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- // ld.d $ra, $rd, %desc_ld(sym)
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- // jirl $ra, $ra, %desc_call(sym)
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+ void LoongArchAsmParser::emitLoadAddressTLSDesc (MCInst &Inst, SMLoc IDLoc,
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+ MCStreamer &Out) {
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+ // la.tls.desc $rd, sym
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MCRegister DestReg = Inst.getOperand (0 ).getReg ();
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- const MCExpr *Symbol = Inst.getOpcode () == LoongArch::PseudoLA_TLS_DESC_ABS
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- ? Inst.getOperand (1 ).getExpr ()
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- : Inst.getOperand (2 ).getExpr ();
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+ const MCExpr *Symbol = Inst.getOperand (1 ).getExpr ();
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+ unsigned ADDI = is64Bit () ? LoongArch::ADDI_D : LoongArch::ADDI_W;
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unsigned LD = is64Bit () ? LoongArch::LD_D : LoongArch::LD_W;
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InstSeq Insts;
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- Insts.push_back (LoongArchAsmParser::Inst (
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- LoongArch::LU12I_W, LoongArchMCExpr::VK_LoongArch_TLS_DESC_HI20));
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- Insts.push_back (LoongArchAsmParser::Inst (
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- LoongArch::ORI, LoongArchMCExpr::VK_LoongArch_TLS_DESC_LO12));
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-
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- if (is64Bit ()) {
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+ if (getSTI ().hasFeature (LoongArch::LaGlobalWithAbs)) {
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+ // with feature: +la-glabal-with-abs
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+ // for la32 expands to:
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+ // lu12i.w $rd, %desc_hi20(sym)
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+ // ori $rd, $rd, %desc_lo12(sym)
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+ // ld.w $ra, $rd, %desc_ld(sym)
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+ // jirl $ra, $ra, %desc_call(sym)
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+ //
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+ // for la64 expands to:
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+ // lu12i.w $rd, %desc_hi20(sym)
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+ // ori $rd, $rd, %desc_lo12(sym)
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+ // lu32i.d $rd, %desc64_lo20(sym)
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+ // lu52i.d $rd, $rd, %desc64_hi12(sym)
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+ // ld.d $ra, $rd, %desc_ld(sym)
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+ // jirl $ra, $ra, %desc_call(sym)
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Insts.push_back (LoongArchAsmParser::Inst (
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- LoongArch::LU32I_D , LoongArchMCExpr::VK_LoongArch_TLS_DESC64_LO20 ));
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+ LoongArch::LU12I_W , LoongArchMCExpr::VK_LoongArch_TLS_DESC_HI20 ));
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Insts.push_back (LoongArchAsmParser::Inst (
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- LoongArch::LU52I_D, LoongArchMCExpr::VK_LoongArch_TLS_DESC64_HI12));
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- }
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+ LoongArch::ORI, LoongArchMCExpr::VK_LoongArch_TLS_DESC_LO12));
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- Insts.push_back (
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- LoongArchAsmParser::Inst (LD, LoongArchMCExpr::VK_LoongArch_TLS_DESC_LD));
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- Insts.push_back (LoongArchAsmParser::Inst (
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- LoongArch::JIRL, LoongArchMCExpr::VK_LoongArch_TLS_DESC_CALL));
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+ if (is64Bit ()) {
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+ Insts.push_back (LoongArchAsmParser::Inst (
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+ LoongArch::LU32I_D, LoongArchMCExpr::VK_LoongArch_TLS_DESC64_LO20));
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+ Insts.push_back (LoongArchAsmParser::Inst (
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+ LoongArch::LU52I_D, LoongArchMCExpr::VK_LoongArch_TLS_DESC64_HI12));
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+ }
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- emitLAInstSeq (DestReg, DestReg, Symbol, Insts, IDLoc, Out);
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- }
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+ Insts.push_back (LoongArchAsmParser::Inst (
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+ LD, LoongArchMCExpr::VK_LoongArch_TLS_DESC_LD));
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+ Insts.push_back (LoongArchAsmParser::Inst (
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+ LoongArch::JIRL, LoongArchMCExpr::VK_LoongArch_TLS_DESC_CALL));
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+
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+ emitLAInstSeq (DestReg, DestReg, Symbol, Insts, IDLoc, Out);
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+ return ;
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+ }
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- void LoongArchAsmParser::emitLoadAddressTLSDescPcrel (MCInst &Inst, SMLoc IDLoc,
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- MCStreamer &Out) {
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- // la.tls.desc $rd, sym
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// expands to:
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// pcalau12i $rd, %desc_pc_hi20(sym)
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// addi.w/d $rd, $rd, %desc_pc_lo12(sym)
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// ld.w/d $ra, $rd, %desc_ld(sym)
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// jirl $ra, $ra, %desc_call(sym)
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- MCRegister DestReg = Inst.getOperand (0 ).getReg ();
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- const MCExpr *Symbol = Inst.getOperand (1 ).getExpr ();
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- unsigned ADDI = is64Bit () ? LoongArch::ADDI_D : LoongArch::ADDI_W;
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- unsigned LD = is64Bit () ? LoongArch::LD_D : LoongArch::LD_W;
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- InstSeq Insts;
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-
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Insts.push_back (LoongArchAsmParser::Inst (
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LoongArch::PCALAU12I, LoongArchMCExpr::VK_LoongArch_TLS_DESC_PC_HI20));
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Insts.push_back (LoongArchAsmParser::Inst (
@@ -1291,9 +1391,8 @@ void LoongArchAsmParser::emitLoadAddressTLSDescPcrel(MCInst &Inst, SMLoc IDLoc,
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emitLAInstSeq (DestReg, DestReg, Symbol, Insts, IDLoc, Out);
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}
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- void LoongArchAsmParser::emitLoadAddressTLSDescPcrelLarge (MCInst &Inst,
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- SMLoc IDLoc,
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- MCStreamer &Out) {
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+ void LoongArchAsmParser::emitLoadAddressTLSDescLarge (MCInst &Inst, SMLoc IDLoc,
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+ MCStreamer &Out) {
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// la.tls.desc $rd, $rj, sym
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// expands to:
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// pcalau12i $rd, %desc_pc_hi20(sym)
@@ -1438,15 +1537,11 @@ bool LoongArchAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
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case LoongArch::PseudoLA_TLS_GD_LARGE:
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emitLoadAddressTLSGDLarge (Inst, IDLoc, Out);
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return false ;
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- case LoongArch::PseudoLA_TLS_DESC_ABS:
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- case LoongArch::PseudoLA_TLS_DESC_ABS_LARGE:
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- emitLoadAddressTLSDescAbs (Inst, IDLoc, Out);
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- return false ;
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- case LoongArch::PseudoLA_TLS_DESC_PC:
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- emitLoadAddressTLSDescPcrel (Inst, IDLoc, Out);
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+ case LoongArch::PseudoLA_TLS_DESC:
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+ emitLoadAddressTLSDesc (Inst, IDLoc, Out);
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return false ;
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- case LoongArch::PseudoLA_TLS_DESC_PC_LARGE :
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- emitLoadAddressTLSDescPcrelLarge (Inst, IDLoc, Out);
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+ case LoongArch::PseudoLA_TLS_DESC_LARGE :
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+ emitLoadAddressTLSDescLarge (Inst, IDLoc, Out);
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return false ;
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case LoongArch::PseudoLI_W:
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case LoongArch::PseudoLI_D:
@@ -1475,10 +1570,8 @@ unsigned LoongArchAsmParser::checkTargetMatchPredicate(MCInst &Inst) {
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return Match_RequiresAMORdDifferRkRj;
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}
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break ;
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- case LoongArch::PseudoLA_TLS_DESC_ABS:
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- case LoongArch::PseudoLA_TLS_DESC_ABS_LARGE:
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- case LoongArch::PseudoLA_TLS_DESC_PC:
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- case LoongArch::PseudoLA_TLS_DESC_PC_LARGE: {
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+ case LoongArch::PseudoLA_TLS_DESC:
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+ case LoongArch::PseudoLA_TLS_DESC_LARGE: {
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MCRegister Rd = Inst.getOperand (0 ).getReg ();
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if (Rd != LoongArch::R4)
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return Match_RequiresLAORdR4;
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